bjorn3
146 lines
4.0 KiB
Rust
146 lines
4.0 KiB
Rust
use alloc::boxed::Box;
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use super::ic_for_chip;
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use crate::{
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arch::device::cpu::registers::control_regs,
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context::{self, timeout},
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dtb::{
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get_interrupt,
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irqchip::{register_irq, InterruptHandler, IRQ_CHIP},
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},
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scheme::irq::irq_trigger,
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sync::CleanLockToken,
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time,
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};
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use fdt::Fdt;
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bitflags! {
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struct TimerCtrlFlags: u32 {
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const ENABLE = 1 << 0;
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const IMASK = 1 << 1;
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const ISTATUS = 1 << 2;
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}
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}
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pub unsafe fn init(fdt: &Fdt) {
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unsafe {
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let mut timer = GenericTimer::new();
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timer.init();
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if let Some(node) = fdt.find_compatible(&["arm,armv7-timer"]) {
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let irq = get_interrupt(fdt, &node, 1).unwrap();
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debug!("irq = {:?}", irq);
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if let Some(ic_idx) = ic_for_chip(&fdt, &node) {
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//PHYS_NONSECURE_PPI only
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let virq = IRQ_CHIP.irq_chip_list.chips[ic_idx]
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.ic
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.irq_xlate(irq)
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.unwrap();
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info!("generic_timer virq = {}", virq);
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register_irq(virq as u32, Box::new(timer));
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IRQ_CHIP.irq_enable(virq as u32);
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} else {
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error!("Failed to find irq parent for generic timer");
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}
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}
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}
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}
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pub struct GenericTimer {
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pub use_virtual_timer: bool,
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pub clk_freq: u32,
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pub reload_count: u32,
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}
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impl GenericTimer {
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pub fn new() -> Self {
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Self {
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use_virtual_timer: false,
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clk_freq: 0,
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reload_count: 0,
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}
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}
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pub fn init(&mut self) {
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self.use_virtual_timer = unsafe { !control_regs::vhe_present() };
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debug!(
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"generic_timer use_virtual_timer = {:?}",
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self.use_virtual_timer
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);
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let clk_freq = unsafe { control_regs::cntfrq_el0() };
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self.clk_freq = clk_freq;
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self.reload_count = clk_freq / 100;
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self.reload_count();
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}
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fn read_tmr_ctrl(&self) -> TimerCtrlFlags {
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TimerCtrlFlags::from_bits_truncate(if self.use_virtual_timer {
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unsafe { control_regs::vtmr_ctrl() }
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} else {
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unsafe { control_regs::ptmr_ctrl() }
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})
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}
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fn write_tmr_ctrl(&self, ctrl: TimerCtrlFlags) {
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if self.use_virtual_timer {
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unsafe { control_regs::vtmr_ctrl_write(ctrl.bits()) };
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} else {
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unsafe { control_regs::ptmr_ctrl_write(ctrl.bits()) };
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}
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}
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#[allow(unused)]
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fn disable(&self) {
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let mut ctrl = self.read_tmr_ctrl();
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ctrl.remove(TimerCtrlFlags::ENABLE);
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self.write_tmr_ctrl(ctrl);
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}
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#[allow(unused)]
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pub fn set_irq(&mut self) {
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let mut ctrl = self.read_tmr_ctrl();
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ctrl.remove(TimerCtrlFlags::IMASK);
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self.write_tmr_ctrl(ctrl);
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}
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pub fn clear_irq(&mut self) {
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let mut ctrl = self.read_tmr_ctrl();
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if ctrl.contains(TimerCtrlFlags::ISTATUS) {
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ctrl.insert(TimerCtrlFlags::IMASK);
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self.write_tmr_ctrl(ctrl);
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}
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}
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pub fn reload_count(&mut self) {
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if self.use_virtual_timer {
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unsafe { control_regs::vtmr_tval_write(self.reload_count) };
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} else {
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unsafe { control_regs::ptmr_tval_write(self.reload_count) };
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}
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let mut ctrl = self.read_tmr_ctrl();
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ctrl.insert(TimerCtrlFlags::ENABLE);
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ctrl.remove(TimerCtrlFlags::IMASK);
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self.write_tmr_ctrl(ctrl);
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}
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}
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impl InterruptHandler for GenericTimer {
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fn irq_handler(&mut self, irq: u32, token: &mut CleanLockToken) {
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self.clear_irq();
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{
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*time::OFFSET.write(token.token()) += self.clk_freq as u128;
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}
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timeout::trigger(token);
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context::switch::tick(token);
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unsafe {
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// FIXME add_irq accepts a u8 as irq number
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// PercpuBlock::current().stats.add_irq(irq);
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irq_trigger(irq.try_into().unwrap(), token);
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IRQ_CHIP.irq_eoi(irq);
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}
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self.reload_count();
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}
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}
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