vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
88 lines
4.0 KiB
ArmAsm
88 lines
4.0 KiB
ArmAsm
// REQUIRES: arm
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
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// RUN: echo "SECTIONS { \
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// RUN: . = SIZEOF_HEADERS; \
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// RUN: .text_low : { *(.text_low) *(.text_low2) . = . + 0x2000000 ; *(.text_high) *(.text_high2) } \
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// RUN: } " > %t.script
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// RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
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// RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
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// RUN: ld.lld --no-rosegment --script %t.script %t -o %t2
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
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// RUN: ld.lld --be8 --no-rosegment --script %t.script %t -o %t2
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x94 --stop-address=0xbc | FileCheck --check-prefix=CHECK1 %s
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// RUN: llvm-objdump --no-print-imm-hex -d %t2 --start-address=0x20000bc --stop-address=0x20000de | FileCheck --check-prefix=CHECK2 %s
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// Test that range extension thunks can handle location expressions within
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// a Section Description
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.syntax unified
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.section .text_low, "ax", %progbits
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.thumb
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.globl _start
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_start: bx lr
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.globl low_target
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.type low_target, %function
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low_target:
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bl high_target
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bl high_target2
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.section .text_low2, "ax", %progbits
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.thumb
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.globl low_target2
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.type low_target2, %function
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low_target2:
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bl high_target
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bl high_target2
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// CHECK1: Disassembly of section .text_low:
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// CHECK1-EMPTY:
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// CHECK1-NEXT: <_start>:
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// CHECK1-NEXT: 94: 4770 bx lr
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// CHECK1: <low_target>:
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// CHECK1-NEXT: 96: f000 f803 bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
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// CHECK1-NEXT: 9a: f000 f806 bl 0xaa <__Thumbv7ABSLongThunk_high_target2>
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// CHECK1: <__Thumbv7ABSLongThunk_high_target>:
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// CHECK1-NEXT: a0: f240 0cbd movw r12, #189
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// CHECK1-NEXT: a4: f2c0 2c00 movt r12, #512
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// CHECK1-NEXT: a8: 4760 bx r12
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// CHECK1: <__Thumbv7ABSLongThunk_high_target2>:
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// CHECK1-NEXT: aa: f240 0cd9 movw r12, #217
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// CHECK1-NEXT: ae: f2c0 2c00 movt r12, #512
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// CHECK1-NEXT: b2: 4760 bx r12
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// CHECK1: <low_target2>:
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// CHECK1-NEXT: b4: f7ff fff4 bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
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// CHECK1-NEXT: b8: f7ff fff7 bl 0xaa <__Thumbv7ABSLongThunk_high_target2>
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.section .text_high, "ax", %progbits
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.thumb
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.globl high_target
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.type high_target, %function
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high_target:
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bl low_target
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bl low_target2
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.section .text_high2, "ax", %progbits
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.thumb
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.globl high_target2
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.type high_target2, %function
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high_target2:
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bl low_target
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bl low_target2
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// CHECK2: <high_target>:
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// CHECK2-NEXT: 20000bc: f000 f802 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
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// CHECK2-NEXT: 20000c0: f000 f805 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
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// CHECK2: <__Thumbv7ABSLongThunk_low_target>:
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// CHECK2-NEXT: 20000c4: f240 0c97 movw r12, #151
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// CHECK2-NEXT: 20000c8: f2c0 0c00 movt r12, #0
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// CHECK2-NEXT: 20000cc: 4760 bx r12
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// CHECK2: <__Thumbv7ABSLongThunk_low_target2>:
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// CHECK2-NEXT: 20000ce: f240 0cb5 movw r12, #181
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// CHECK2-NEXT: 20000d2: f2c0 0c00 movt r12, #0
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// CHECK2-NEXT: 20000d6: 4760 bx r12
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// CHECK2: <high_target2>:
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// CHECK2-NEXT: 20000d8: f7ff fff4 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
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// CHECK2-NEXT: 20000dc: f7ff fff7 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
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