vasilito
841773c3a7
Ultraworked with [Sisyphus](https://github.com/code-yeongyu/oh-my-openagent) Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
109 lines
3.1 KiB
Python
109 lines
3.1 KiB
Python
#!/usr/bin/env python3
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import importlib.util
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import pathlib
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import unittest
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SCRIPT_PATH = pathlib.Path(__file__).with_name("extract-linux-quirks.py")
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SPEC = importlib.util.spec_from_file_location("extract_linux_quirks", SCRIPT_PATH)
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if SPEC is None or SPEC.loader is None:
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raise RuntimeError(f"failed to load module spec for {SCRIPT_PATH}")
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MODULE = importlib.util.module_from_spec(SPEC)
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SPEC.loader.exec_module(MODULE)
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class ExtractLinuxQuirksPciTests(unittest.TestCase):
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def test_direct_flag_assignment_maps_to_redbear_flag(self):
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source = """
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static void quirk_no_d3(struct pci_dev *dev)
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{
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dev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
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}
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DECLARE_PCI_FIXUP_FINAL(0x1002, 0x67DF, quirk_no_d3);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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self.assertEqual(mapped[0][1], ["no_d3cold"])
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def test_multi_flag_assignment_maps_all_supported_flags(self):
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source = """
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static void quirk_multi(struct pci_dev *dev)
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{
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dev->dev_flags |= PCI_DEV_FLAGS_NO_MSI | PCI_DEV_FLAGS_NO_MSIX | PCI_DEV_FLAGS_NO_ASPM;
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}
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DECLARE_PCI_FIXUP_HEADER(0x8086, 0x1234, quirk_multi);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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self.assertEqual(mapped[0][1], ["no_aspm", "no_msi", "no_msix"])
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def test_helper_call_maps_no_d3cold(self):
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source = """
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static void quirk_disable_d3cold(struct pci_dev *pdev)
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{
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pci_d3cold_disable(pdev);
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}
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DECLARE_PCI_FIXUP_ENABLE(0x1022, 0x1481, quirk_disable_d3cold);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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self.assertEqual(mapped[0][1], ["no_d3cold"])
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def test_unsupported_handler_body_yields_no_flags(self):
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source = """
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static void quirk_vendor_workaround(struct pci_dev *dev)
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{
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pci_info(dev, "workaround only\n");
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}
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DECLARE_PCI_FIXUP_LATE(0x10DE, 0x1C82, quirk_vendor_workaround);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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self.assertEqual(mapped[0][1], [])
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self.assertEqual(MODULE.format_pci_toml(mapped), "")
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def test_handler_name_false_positive_regression_is_ignored(self):
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source = """
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static void quirk_pci_dev_flags_no_msi_name_only(struct pci_dev *dev)
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{
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pci_info(dev, "name should not drive extraction\n");
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}
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DECLARE_PCI_FIXUP_FINAL(0x1234, 0x5678, quirk_pci_dev_flags_no_msi_name_only);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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self.assertEqual(mapped[0][1], [])
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def test_class_fixup_carries_class_fields_into_toml_output(self):
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source = """
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static void quirk_class_based(struct pci_dev *dev)
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{
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dev->dev_flags |= PCI_DEV_FLAGS_ASSIGN_BARS | PCI_DEV_FLAGS_BROKEN_PM;
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}
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DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_ANY_ID, PCI_ANY_ID, 0x030000, 0xFFFF00, quirk_class_based);
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"""
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mapped = MODULE.map_pci_fixups_to_flags(source)
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toml_output = MODULE.format_pci_toml(mapped)
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self.assertEqual(mapped[0][1], ["disable_bar_sizing", "no_pm"])
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self.assertIn("[[pci_quirk]]", toml_output)
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self.assertIn("class = 0x030000", toml_output)
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self.assertIn("class_mask = 0xFFFF00", toml_output)
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self.assertIn('flags = ["disable_bar_sizing", "no_pm"]', toml_output)
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if __name__ == "__main__":
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unittest.main()
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