Add display_watermark.rs — DBUF slice enable and per-pipe
watermark programming for Xe2/Gen12+ platforms.
- init_xe2(): enable DBUF_CTL_S1 (0x45008) and DBUF_CTL_S2 (0x4500C)
with DBUF_SLICE_ENABLE + DBUF_TRACKER_STATE_SERVICE
- program_pipe_watermarks(): set PLANE_BUF_CFG (0x7017C) and
PLANE_WM (0x70240) per pipe — zero for initial program, needs
real values for production
- compute_min_cdclk(): calculate minimum CDCLK from pixel clock,
lane count, and bits-per-pixel
Wire into IntelDriver — initialized after power wells, before DMC.
Linux reference: intel_dbuf.c, skl_watermark.c
vasilito
901fc44b6f