quirks: implement R0-R5 — data-driven PCI/USB/DMI bitmask system
Foundational data-driven hardware-quirk system with all entries through
Phase R5. Source of truth: Linux 7.1 DECLARE_PCI_FIXUP_* and PCI_DEV_FLAGS_*
conventions. Targets AMD64 bare metal, QEMU, and modern peripherals.
Code (redox-driver-sys/src/quirks/):
- PciQuirkFlags: 46 bits used (0-45), 18 reserved
- UsbQuirkFlags + XhciControllerQuirkFlags tables
- PciConfigWriter trait + QuirkAction enum (7 variants)
- 14 named callbacks (intel_no_aspm_l0s, amd_ide_class_fix,
ht_enable_msi_mapping, p64h2_1k_io, intel_ntb_bar_fix, 7 DMA-alias
callbacks, amd_fe_gate_ordering, amd_8131_mmrbc)
- lookup_pci_quirks_full, lookup_pci_quirks, lookup_usb_quirks,
lookup_xhci_controller_quirks, lookup_dmi_rules
- find_standard_capability for PCI cap walks
- TOML loader with [[pci_quirk]] / [[usb_quirk]] / [[dmi_rule]] sections
- 75 tests pass (mod.rs + toml_loader + dmi + others)
Phase R5 adds (2026-06-07):
- 10 new flag bits (36-45): BROKEN_INTX_MASKING, NO_PME, PCI_PROBLEM_*,
PCI_AGP_FAIL, BUS_NO_MMRBC
- 2 new callbacks: cb_amd_fe_gate_ordering (AMD-762 two-register write),
cb_amd_8131_mmrbc (rev-gated < 0x12, sets BUS_NO_MMRBC)
- Inline ClearBit/SetBit actions for Mellanox, Cyrix, Intel, VIA
- 18 new Phase R5 tests (10 mod.rs + 8 toml_loader)
TOML (10 files, 244 entries in 07-pci-final-quirks.toml total):
00-core.toml (41)
05-pcie-quirks.toml (52)
06-pci-header-quirks.toml (37)
07-pci-final-quirks.toml (64) — R5 DECLARE_PCI_FIXUP_FINAL
10-gpu.toml (33)
15-audio.toml (7)
Verified: 38 distinct flag names used, 46 defined, 0 undefined references.
Docs: local/docs/QUIRKS-SYSTEM.md — R0-R5 implementation reports (2424 lines)
vasilito
86902d4819