vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
99 lines
4.2 KiB
C
99 lines
4.2 KiB
C
// RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-feature +neon \
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// RUN: -target-feature +sha2 -target-feature +aes \
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// RUN: -target-cpu cortex-a57 -emit-llvm -O1 -o - %s | FileCheck %s
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// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
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// RUN: -target-feature +sha2 -target-feature +aes \
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// RUN: -emit-llvm -O1 -o - %s | FileCheck %s
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// RUN: not %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
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// RUN: -S -O3 -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NO-CRYPTO %s
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// REQUIRES: aarch64-registered-target || arm-registered-target
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#include <arm_neon.h>
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uint8x16_t test_vaeseq_u8(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: @test_vaeseq_u8
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// CHECK-NO-CRYPTO: error: always_inline function 'vaeseq_u8' requires target feature 'aes'
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return vaeseq_u8(data, key);
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// CHECK: call <16 x i8> @llvm.{{arm.neon|aarch64.crypto}}.aese(<16 x i8> %data, <16 x i8> %key)
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}
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uint8x16_t test_vaesdq_u8(uint8x16_t data, uint8x16_t key) {
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// CHECK-LABEL: @test_vaesdq_u8
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return vaesdq_u8(data, key);
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// CHECK: call <16 x i8> @llvm.{{arm.neon|aarch64.crypto}}.aesd(<16 x i8> %data, <16 x i8> %key)
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}
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uint8x16_t test_vaesmcq_u8(uint8x16_t data) {
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// CHECK-LABEL: @test_vaesmcq_u8
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return vaesmcq_u8(data);
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// CHECK: call <16 x i8> @llvm.{{arm.neon|aarch64.crypto}}.aesmc(<16 x i8> %data)
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}
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uint8x16_t test_vaesimcq_u8(uint8x16_t data) {
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// CHECK-LABEL: @test_vaesimcq_u8
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return vaesimcq_u8(data);
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// CHECK: call <16 x i8> @llvm.{{arm.neon|aarch64.crypto}}.aesimc(<16 x i8> %data)
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}
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uint32_t test_vsha1h_u32(uint32_t hash_e) {
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// CHECK-LABEL: @test_vsha1h_u32
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return vsha1h_u32(hash_e);
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// CHECK: call i32 @llvm.{{arm.neon|aarch64.crypto}}.sha1h(i32 %hash_e)
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}
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uint32x4_t test_vsha1su1q_u32(uint32x4_t w0_3, uint32x4_t w12_15) {
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// CHECK-LABEL: @test_vsha1su1q_u32
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return vsha1su1q_u32(w0_3, w12_15);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha1su1(<4 x i32> %w0_3, <4 x i32> %w12_15)
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}
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uint32x4_t test_vsha256su0q_u32(uint32x4_t w0_3, uint32x4_t w4_7) {
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// CHECK-LABEL: @test_vsha256su0q_u32
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return vsha256su0q_u32(w0_3, w4_7);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha256su0(<4 x i32> %w0_3, <4 x i32> %w4_7)
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}
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uint32x4_t test_vsha1cq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: @test_vsha1cq_u32
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return vsha1cq_u32(hash_abcd, hash_e, wk);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
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}
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uint32x4_t test_vsha1pq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: @test_vsha1pq_u32
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return vsha1pq_u32(hash_abcd, hash_e, wk);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
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}
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uint32x4_t test_vsha1mq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) {
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// CHECK-LABEL: @test_vsha1mq_u32
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return vsha1mq_u32(hash_abcd, hash_e, wk);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk)
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}
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uint32x4_t test_vsha1su0q_u32(uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11) {
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// CHECK-LABEL: @test_vsha1su0q_u32
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return vsha1su0q_u32(w0_3, w4_7, w8_11);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha1su0(<4 x i32> %w0_3, <4 x i32> %w4_7, <4 x i32> %w8_11)
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}
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uint32x4_t test_vsha256hq_u32(uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk) {
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// CHECK-LABEL: @test_vsha256hq_u32
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return vsha256hq_u32(hash_abcd, hash_efgh, wk);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha256h(<4 x i32> %hash_abcd, <4 x i32> %hash_efgh, <4 x i32> %wk)
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}
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uint32x4_t test_vsha256h2q_u32(uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk) {
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// CHECK-LABEL: @test_vsha256h2q_u32
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return vsha256h2q_u32(hash_efgh, hash_abcd, wk);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha256h2(<4 x i32> %hash_efgh, <4 x i32> %hash_abcd, <4 x i32> %wk)
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}
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uint32x4_t test_vsha256su1q_u32(uint32x4_t w0_3, uint32x4_t w8_11, uint32x4_t w12_15) {
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// CHECK-LABEL: @test_vsha256su1q_u32
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return vsha256su1q_u32(w0_3, w8_11, w12_15);
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// CHECK: call <4 x i32> @llvm.{{arm.neon|aarch64.crypto}}.sha256su1(<4 x i32> %w0_3, <4 x i32> %w8_11, <4 x i32> %w12_15)
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}
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