vasilito 6d8a1db8f1 intel: DSC + DRRS architecture documentation ...

dsc.rs: Display Stream Compression 1.2a
  2-3x link bandwidth reduction, required for 4K+ over DP 1.4
  PPS 128-byte configuration block (slice dimensions, BPC, rate control)
  DSC_CTL + DPCD sink communication

drrs.rs: Display Refresh Rate Switching
  15-30% panel power savings via dynamic refresh rate
  Compositor-driven idle detection with mark_active()
  DRRS_CTL idle frame counter + DRRS_STATUS monitoring

Intel driver: 95 files, 0 errors — 32 spec-commented files

2026-06-02 11:52:49 +03:00

..

Assets/images

Red Bear OS — microkernel OS in Rust, based on Redox

2026-04-12 19:05:00 +01:00

cache

migrate: finalize source ownership — mini ISO builds and boots

2026-05-30 00:38:25 +03:00

config

Merge bootprocess branch overlay into 0.2.0

2026-05-27 06:47:23 +03:00

docs

intel: fix pre-Gen9 per-gen flags, enable Gen8 PPGTT, expand plan

2026-06-01 22:59:09 +03:00

recipes

intel: DSC + DRRS architecture documentation

2026-06-02 11:52:49 +03:00

scripts

fix: complete m4 recipe - fix_types.h with all sys types, typedef stripping

2026-06-01 21:03:27 +03:00

sources

fix: bits_pthread cbindgen needs stddef.h for size_t type

2026-06-01 17:00:53 +03:00

AGENTS.md

docs: rewrite local/AGENTS.md for source ownership model

2026-05-29 22:54:38 +03:00