Phase R15 (2026-06-07) — timekeeping / TSC sync. The
data side lands now; TSC sync itself is algorithmic
(mark_tsc_unstable in the kernel) and is not represented.
Changes:
1. ClocksourceQuirkFlags (mod.rs:415) with 4 bits:
PMTMR_BLACKLIST, PMTMR_GRAYLIST, TSC_UNSTABLE,
HPET_BROKEN. Only PMTMR bits fire today; TSC_UNSTABLE
and HPET_BROKEN are reserved for future kernel-side
use.
2. ClocksourceQuirkEntry (mod.rs:445) — vendor / device /
revision_lo / revision_hi / flags. matches() handles
vendor / device wildcards (0xFFFF) and revision range
(lo..=hi, with lo=0, hi=0xFF as the wildcard).
3. CLOCKSOURCE_FLAG_NAMES + parse_clocksource_toml +
load_clocksource_flags (toml_loader.rs) — new
[[clocksource_quirk]] TOML table type with vendor +
device + revision_lo + revision_hi + flags.
4. 1 new unit test: phase_r15_clocksource_quirk_entry_matches
exercises the range match + 4 wildcard combinations
(vendor, device, revision out of range, revision
wildcard). 126/126 tests pass.
5. quirks.d/35-clocksource.toml (44 lines) — 3 entries
sourced from Linux 7.1
drivers/clocksource/acpi_pm.c:
- Intel 82371AB_3 (PIIX4) 0x7113 rev 0..=2 → blacklist
- Intel 82801DB_0 (ICH4) 0x24C0 → graylist
- ServerWorks LE 0x0009 → graylist
cargo test: 126/126 (was 125, +1 for the new test).
cargo check: clean.
The kernel-side clocksource engine (R15 consumer) will
call load_clocksource_flags() at PMTMR probe time and
select / reject the PMTMR clocksource accordingly.
vasilito
57778e7898