4lDO2
303 lines
7.8 KiB
Rust
303 lines
7.8 KiB
Rust
use core::mem;
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use core::sync::atomic::AtomicBool;
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use crate::syscall::FloatRegisters;
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use memoffset::offset_of;
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/// This must be used by the kernel to ensure that context switches are done atomically
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/// Compare and exchange this to true when beginning a context switch on any CPU
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/// The `Context::switch_to` function will set it back to false, allowing other CPU's to switch
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/// This must be done, as no locks can be held on the stack during switch
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pub static CONTEXT_SWITCH_LOCK: AtomicBool = AtomicBool::new(false);
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const ST_RESERVED: u128 = 0xFFFF_FFFF_FFFF_0000_0000_0000_0000_0000;
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#[derive(Clone, Debug)]
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#[repr(C)]
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pub struct Context {
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/// FX location
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fx: usize,
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/// Page table pointer
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cr3: usize,
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/// RFLAGS register
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rflags: usize,
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/// RBX register
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rbx: usize,
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/// R12 register
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r12: usize,
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/// R13 register
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r13: usize,
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/// R14 register
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r14: usize,
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/// R15 register
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r15: usize,
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/// Base pointer
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rbp: usize,
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/// Stack pointer
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rsp: usize,
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/// FX valid?
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loadable: AbiCompatBool,
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}
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#[repr(u8)]
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#[derive(Clone, Copy, Debug, Eq, PartialEq)]
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enum AbiCompatBool {
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False,
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True,
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}
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impl Context {
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pub fn new() -> Context {
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Context {
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loadable: AbiCompatBool::False,
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fx: 0,
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cr3: 0,
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rflags: 0,
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rbx: 0,
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r12: 0,
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r13: 0,
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r14: 0,
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r15: 0,
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rbp: 0,
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rsp: 0
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}
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}
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pub fn get_page_utable(&mut self) -> usize {
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self.cr3
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}
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pub fn get_fx_regs(&self) -> Option<FloatRegisters> {
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if self.loadable == AbiCompatBool::False {
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return None;
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}
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let mut regs = unsafe { *(self.fx as *const FloatRegisters) };
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regs._reserved = 0;
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let mut new_st = regs.st_space;
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for st in &mut new_st {
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// Only allow access to the 80 lowest bits
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*st &= !ST_RESERVED;
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}
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regs.st_space = new_st;
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Some(regs)
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}
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pub fn set_fx_regs(&mut self, mut new: FloatRegisters) -> bool {
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if self.loadable == AbiCompatBool::False {
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return false;
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}
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{
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let old = unsafe { &*(self.fx as *const FloatRegisters) };
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new._reserved = old._reserved;
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let old_st = new.st_space;
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let mut new_st = new.st_space;
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for (new_st, old_st) in new_st.iter_mut().zip(&old_st) {
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*new_st &= !ST_RESERVED;
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*new_st |= old_st & ST_RESERVED;
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}
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new.st_space = new_st;
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// Make sure we don't use `old` from now on
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}
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unsafe {
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*(self.fx as *mut FloatRegisters) = new;
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}
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true
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}
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pub fn set_fx(&mut self, address: usize) {
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self.fx = address;
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}
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pub fn set_page_utable(&mut self, address: usize) {
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self.cr3 = address;
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}
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pub fn set_stack(&mut self, address: usize) {
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self.rsp = address;
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}
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pub unsafe fn signal_stack(&mut self, handler: extern fn(usize), sig: u8) {
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self.push_stack(sig as usize);
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self.push_stack(handler as usize);
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self.push_stack(signal_handler_wrapper as usize);
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}
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pub unsafe fn push_stack(&mut self, value: usize) {
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self.rsp -= mem::size_of::<usize>();
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*(self.rsp as *mut usize) = value;
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}
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pub unsafe fn pop_stack(&mut self) -> usize {
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let value = *(self.rsp as *const usize);
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self.rsp += mem::size_of::<usize>();
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value
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}
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}
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/// Switch to the next context by restoring its stack and registers
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/// Check disassembly!
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#[inline(never)]
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#[naked]
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pub unsafe extern "C" fn switch_to(_prev: &mut Context, _next: &mut Context) {
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use Context as Cx;
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asm!(
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// As a quick reminder for those who are unfamiliar with the System V ABI (extern "C"):
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//
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// - the current parameters are passed in the registers `rdi`, `rsi`,
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// - we can modify scratch registers, e.g. rax
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// - we cannot change callee-preserved registers arbitrarily, e.g. rbx, which is why we
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// store them here in the first place.
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"
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// load `prev.fx`
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mov rax, [rdi + {off_fx}]
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// save processor SSE/FPU/AVX state in `prev.fx` pointee
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fxsave64 [rax]
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// set `prev.loadable` to true
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mov BYTE PTR [rdi + {off_loadable}], {true}
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// compare `next.loadable` with true
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cmp BYTE PTR [rsi + {off_loadable}], {true}
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je switch_to.next_is_loadable
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fninit
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jmp switch_to.after_fx
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switch_to.next_is_loadable:
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mov rax, [rsi + {off_fx}]
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fxrstor64 [rax]
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switch_to.after_fx:
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// Save the current CR3, and load the next CR3 if not identical
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mov rcx, cr3
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mov [rdi + {off_cr3}], rcx
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mov rax, [rsi + {off_cr3}]
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cmp rax, rcx
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je switch_to.same_cr3
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mov cr3, rax
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switch_to.same_cr3:
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// Save old registers, and load new ones
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mov [rdi + {off_rbx}], rbx
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mov rbx, [rsi + {off_rbx}]
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mov [rdi + {off_r12}], r12
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mov r12, [rsi + {off_r12}]
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mov [rdi + {off_r13}], r13
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mov r13, [rsi + {off_r13}]
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mov [rdi + {off_r14}], r14
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mov r14, [rsi + {off_r14}]
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mov [rdi + {off_r15}], r15
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mov r15, [rsi + {off_r15}]
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mov [rdi + {off_rbp}], rbp
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mov rbp, [rsi + {off_rbp}]
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mov [rdi + {off_rsp}], rsp
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mov rsp, [rsi + {off_rsp}]
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// push RFLAGS (can only be modified via stack)
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pushfq
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// pop RFLAGS into `self.rflags`
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pop QWORD PTR [rdi + {off_rflags}]
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// push `next.rflags`
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push QWORD PTR [rsi + {off_rflags}]
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// pop into RFLAGS
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popfq
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// When we return, we cannot even guarantee that the return address on the stack, points to
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// the calling function, `context::switch`. Thus, we have to execute this Rust hook by
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// ourselves, which will unlock the contexts before the later switch.
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// Note that switch_finish_hook will be responsible for executing `ret`.
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jmp {switch_hook}
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",
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off_fx = const(offset_of!(Cx, fx)),
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off_cr3 = const(offset_of!(Cx, cr3)),
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off_rflags = const(offset_of!(Cx, rflags)),
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off_loadable = const(offset_of!(Cx, loadable)),
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off_rbx = const(offset_of!(Cx, rbx)),
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off_r12 = const(offset_of!(Cx, r12)),
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off_r13 = const(offset_of!(Cx, r13)),
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off_r14 = const(offset_of!(Cx, r14)),
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off_r15 = const(offset_of!(Cx, r15)),
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off_rbp = const(offset_of!(Cx, rbp)),
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off_rsp = const(offset_of!(Cx, rsp)),
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true = const(AbiCompatBool::True as u8),
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switch_hook = sym crate::context::switch_finish_hook,
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options(noreturn),
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);
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}
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#[allow(dead_code)]
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#[repr(packed)]
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pub struct SignalHandlerStack {
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r11: usize,
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r10: usize,
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r9: usize,
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r8: usize,
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rsi: usize,
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rdi: usize,
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rdx: usize,
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rcx: usize,
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rax: usize,
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handler: extern fn(usize),
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sig: usize,
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rip: usize,
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}
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#[naked]
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unsafe extern fn signal_handler_wrapper() {
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#[inline(never)]
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unsafe extern "C" fn inner(stack: &SignalHandlerStack) {
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(stack.handler)(stack.sig);
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}
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// Push scratch registers
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asm!(
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"
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push rax
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push rcx
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push rdx
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push rdi
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push rsi
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push r8
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push r9
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push r10
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push r11
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mov rdi, rsp
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call {inner}
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pop r11
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pop r10
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pop r9
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pop r8
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pop rsi
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pop rdi
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pop rdx
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pop rcx
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pop rax
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add rsp, 16
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ret
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",
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inner = sym inner,
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options(noreturn),
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);
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}
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