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33eece116a38a2f88c2f8daeb73b6317d5d287d2
RedBear-OS/recipes/tools/gnu-binutils/source/ld/testsuite/ld-mips-elf/multi-got-1.d
T
vasilito ff4ff35918 feat: track all source trees in git — full fork offline-first model 
Red Bear OS is a full fork. All sources must be available from git clone
with zero network access. Removed gitignore rules that excluded fetched
source trees under recipes/*/source/, local/recipes/kde/*/source/,
local/recipes/qt/*/source/, and vendor source trees.

Build artifacts (target/, build/, source.tar, *.o, *.so) remain excluded.

127291 files added — kernel, relibc, base, bootloader, pkgar, all KDE/Qt
frameworks, mesa, wayland, DRM drivers, and every other recipe source.
2026-05-14 10:55:53 +01:00

8223 lines
521 KiB
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#name: MIPS multi-got-1
#as: -KPIC
#source: multi-got-1-1.s
#source: multi-got-1-2.s
#ld: -shared
#readelf: -d -r
Dynamic section at offset .* contains 17 entries:
Tag Type Name/Value
0x00000004 \(HASH\) 0x[0-9a-f]+
0x00000005 \(STRTAB\) 0x[0-9a-f]+
0x00000006 \(SYMTAB\) 0x[0-9a-f]+
0x0000000a \(STRSZ\) [0-9]+ \(bytes\)
0x0000000b \(SYMENT\) 16 \(bytes\)
0x00000003 \(PLTGOT\) 0x[0-9a-f]+
0x00000011 \(REL\) 0x[0-9a-f]+
0x00000012 \(RELSZ\) 65544 \(bytes\)
0x00000013 \(RELENT\) 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) 1
0x70000005 \(MIPS_FLAGS\) NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) 0x0
0x7000000a \(MIPS_LOCAL_GOTNO\) 2
0x70000011 \(MIPS_SYMTABNO\) [0-9]+
0x70000012 \(MIPS_UNREFEXTNO\) [0-9]+
0x70000013 \(MIPS_GOTSYM\) 0x[0-9a-f]+
0x00000000 \(NULL\) 0x0
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Offset Info Type Sym.Value Sym. Name
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^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
^[0-9a-f]+ [0-9a-f]+ R_MIPS_REL32 [0-9a-f]+ sym_2_[0-9]+
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