Files
RedBear-OS/local
vasilito 31c19fe839 intel: Phase 2c - free-list VRAM allocator + PAT init + regs_gt PAT constants
- gem_lmem: Replace bump allocator with best-fit free-list (BTreeMap) that
  tracks individual allocations and coalesces freed blocks on both sides
- mocs: Add init_pat() - programs PAT index 0-7 with WB/WC/WT/UC for Gen9+,
  and WB-only for Gen12+; called after init_mocs() in IntelDriver init
- regs_gt: Add PAT register constants (GEN8_PRIVATE_PAT_*, GEN12_PAT_INDEX,
  GEN8_PPAT_* cache attributes) and TBIMR_FAST_CLIP
- PAT programming: Gen9 uses 0x40E0 base with LLC/LLCELLC attributes,
  Gen12 uses 0x4800 base with simple WB/WC/WT/UC (no LLC on Xe2)
- All changes compile clean (0 errors)
2026-06-03 10:57:21 +03:00
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