vasilito
29ff1ea8fc
- P19-init-startup-hardening: Replace panic-grade expect/unwrap in init startup paths (getns, register_scheme_to_ns, setrens, filename parsing) with graceful error handling and logging - P19-acpid-startup-hardening: Replace panic-grade calls in acpid with graceful degradation (rxsdt read failure → warn + exit 0, SDT parse → error + exit 1, I/O privilege → fatal, scheme registration → fatal, setrens → warn + continue, event loop errors → log + continue) - P18-9-msi-allocation-resilience: Regenerate with git diff -U0 -w format for maximum context resilience - fetch.rs: Change --fuzz=0 to --fuzz=3 for resilient patch application - AGENTS.md: Document robust patch generation technique as mandatory - Add P4/P5/P6/P7 patches (estale, dmi, i2c, ps2d hardening) - Add P21 kernel x2apic SMP fix patch - Multiple local recipe source improvements (redox-drm, driver-manager, driver-acpi, thermald) - Config updates for redbear-mini and redbear-device-services - Subsystem assessment document
52 lines
2.1 KiB
Diff
52 lines
2.1 KiB
Diff
diff --git a/drivers/acpid/src/aml_physmem.rs b/drivers/acpid/src/aml_physmem.rs
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--- a/drivers/acpid/src/aml_physmem.rs
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+++ b/drivers/acpid/src/aml_physmem.rs
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@@ -143,7 +143,7 @@
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#[derive(Clone)]
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pub struct AmlPhysMemHandler {
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page_cache: Arc<Mutex<AmlPageCache>>,
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- pci_fd: Arc<Option<libredox::Fd>>,
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+ pci_fd: Arc<parking_lot::RwLock<Option<libredox::Fd>>>,
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aml_mutexes: Arc<Mutex<FxHashMap<u32, Arc<AmlMutex>>>>,
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next_mutex_handle: Arc<AtomicU32>,
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}
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@@ -163,16 +163,10 @@
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/// Read from a physical address.
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/// Generic parameter must be u8, u16, u32 or u64.
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impl AmlPhysMemHandler {
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- pub fn new(pci_fd_opt: Option<&libredox::Fd>, page_cache: Arc<Mutex<AmlPageCache>>) -> Self {
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- let pci_fd = if let Some(pci_fd) = pci_fd_opt {
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- Some(libredox::Fd::new(pci_fd.raw()))
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- } else {
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- log::error!("pci_fd is not registered");
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- None
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- };
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+ pub fn new(pci_fd: Arc<parking_lot::RwLock<Option<libredox::Fd>>>, page_cache: Arc<Mutex<AmlPageCache>>) -> Self {
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Self {
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page_cache,
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- pci_fd: Arc::new(pci_fd),
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+ pci_fd,
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aml_mutexes: Arc::new(Mutex::new(FxHashMap::default())),
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next_mutex_handle: Arc::new(AtomicU32::new(1)),
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}
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@@ -218,7 +212,8 @@
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fn read_pci(&self, addr: PciAddress, off: u16, value: &mut [u8]) {
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let metadata = Self::pci_call_metadata(1, addr, off);
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- match &*self.pci_fd {
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+ let guard = self.pci_fd.read();
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+ match guard.as_ref() {
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Some(pci_fd) => match pci_fd.call_ro(value, syscall::CallFlags::empty(), &metadata) {
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Ok(_) => {}
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Err(err) => {
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@@ -236,7 +231,8 @@
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fn write_pci(&self, addr: PciAddress, off: u16, value: &[u8]) {
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let metadata = Self::pci_call_metadata(2, addr, off);
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- match &*self.pci_fd {
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+ let guard = self.pci_fd.read();
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+ match guard.as_ref() {
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Some(pci_fd) => match pci_fd.call_wo(value, syscall::CallFlags::empty(), &metadata) {
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Ok(_) => {}
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Err(err) => {
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