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ff4ff35918
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127 lines
2.9 KiB
NASM
127 lines
2.9 KiB
NASM
dnl x86 mpn_gcd_11 optimised for processors with slow BSF.
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dnl Based on C version.
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dnl Copyright 2019 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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dnl Rudimentary code for x86-32, i.e. for CPUs without cmov. Also, the bsf
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dnl instruction is assumed to be so slow it is useless. Instead a teble is
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dnl used.
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dnl
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dnl The loop benefits from OoO, in-order CPUs might want a different loop.
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dnl The ebx and ecx registers could be combined if the assigment of ecx were
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dnl postponed until ebx died, but that would at least hurt in-order CPUs.
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C cycles/bit (approx)
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C AMD K7 ?
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C AMD K8,K9 ?
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C AMD K10 ?
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C AMD bd1 ?
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C AMD bd2 ?
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C AMD bd3 ?
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C AMD bd4 ?
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C AMD bt1 ?
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C AMD bt2 ?
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C AMD zn1 ?
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C AMD zn2 ?
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C Intel P4-2 ?
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C Intel P4-3/4 ?
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C Intel P6/13 ?
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C Intel CNR ?
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C Intel NHM ?
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C Intel SBR ?
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C Intel IBR ?
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C Intel HWL ?
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C Intel BWL ?
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C Intel SKL ?
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C Intel atom ?
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C Intel SLM ?
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C Intel GLM ?
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C Intel GLM+ ?
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C VIA nano ?
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C Numbers measured with: speed -CD -s8-32 -t24 mpn_gcd_1
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deflit(MAXSHIFT, 6)
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deflit(MASK, eval((m4_lshift(1,MAXSHIFT))-1))
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DEF_OBJECT(ctz_table,64)
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.byte MAXSHIFT
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forloop(i,1,MASK,
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` .byte m4_count_trailing_zeros(i)
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')
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END_OBJECT(ctz_table)
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define(`u0', `%eax')
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define(`v0', `%edx')
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ASM_START()
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TEXT
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ALIGN(16)
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PROLOGUE(mpn_gcd_11)
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push %edi
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push %esi
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push %ebx
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mov 16(%esp), u0
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mov 20(%esp), v0
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LEAL( ctz_table, %esi)
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sub v0, u0 C u = u - v 0
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jz L(end)
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ALIGN(16)
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L(top): sbb %ebx, %ebx C mask 1
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mov u0, %edi C 1
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mov u0, %ecx C 1
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and %ebx, %edi C 2
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xor %ebx, u0 C 2
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add %edi, v0 C v = min(u.v) 3
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sub %ebx, u0 C u = |u - v| 3
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L(mid): and $MASK, %ecx C 2
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movzbl (%esi,%ecx), %ecx C 3
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jz L(shift_alot)
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shr %cl, u0 C 4
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sub v0, u0 C u = u - v 0,5
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jnz L(top)
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L(end): mov v0, %eax
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pop %ebx
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pop %esi
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pop %edi
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ret
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L(shift_alot):
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shr $MAXSHIFT, u0
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mov u0, %ecx
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jmp L(mid)
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EPILOGUE()
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ASM_END()
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