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ff4ff35918
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139 lines
3.2 KiB
NASM
139 lines
3.2 KiB
NASM
dnl ARM64 mpn_lshift.
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dnl Copyright 2013, 2014, 2017 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb assumed optimal c/l
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C Cortex-A53 3.5-4.0 3.25
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C Cortex-A57 2.0 2.0
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C X-Gene 2.67 2.5
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C TODO
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C * The feed-in code used 1 ldr for odd sized and 2 ldr for even sizes. These
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C numbers should be 1 and 0, respectively. The str in wind-down should also
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C go.
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C * Using extr and with 63 separate loops we might reach 1.25 c/l on A57.
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C * A53's speed depends on alignment, tune/speed -w1 gives 3.5, -w0 gives 4.0.
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changecom(blah)
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define(`rp_arg', `x0')
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define(`up', `x1')
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define(`n', `x2')
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define(`cnt', `x3')
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define(`rp', `x16')
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define(`tnc',`x8')
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define(`PSHIFT', lsl)
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define(`NSHIFT', lsr)
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ASM_START()
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PROLOGUE(mpn_lshift)
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add rp, rp_arg, n, lsl #3
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add up, up, n, lsl #3
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sub tnc, xzr, cnt
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lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x4, [up,#-8]
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tbnz n, #1, L(b11)
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L(b01): NSHIFT x0, x4, tnc
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PSHIFT x2, x4, cnt
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cbnz x17, L(gt1)
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str x2, [rp,#-8]
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ret
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L(gt1): ldp x4, x5, [up,#-24]
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sub up, up, #8
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add rp, rp, #16
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b L(lo2)
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L(b11): NSHIFT x0, x4, tnc
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PSHIFT x2, x4, cnt
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ldp x6, x7, [up,#-24]!
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b L(lo3)
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L(bx0): ldp x4, x5, [up,#-16]
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tbz n, #1, L(b00)
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L(b10): NSHIFT x0, x5, tnc
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PSHIFT x13, x5, cnt
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NSHIFT x10, x4, tnc
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PSHIFT x2, x4, cnt
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cbnz x17, L(gt2)
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orr x10, x10, x13
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stp x2, x10, [rp,#-16]
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ret
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L(gt2): ldp x4, x5, [up,#-32]
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orr x10, x10, x13
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str x10, [rp,#-8]
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sub up, up, #16
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add rp, rp, #8
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b L(lo2)
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L(b00): NSHIFT x0, x5, tnc
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PSHIFT x13, x5, cnt
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NSHIFT x10, x4, tnc
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PSHIFT x2, x4, cnt
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ldp x6, x7, [up,#-32]!
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orr x10, x10, x13
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str x10, [rp,#-8]!
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b L(lo0)
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ALIGN(16)
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L(top): ldp x4, x5, [up,#-16]
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orr x10, x10, x13
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orr x11, x12, x2
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stp x10, x11, [rp,#-16]
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PSHIFT x2, x6, cnt
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L(lo2): NSHIFT x10, x4, tnc
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PSHIFT x13, x5, cnt
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NSHIFT x12, x5, tnc
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ldp x6, x7, [up,#-32]!
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orr x10, x10, x13
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orr x11, x12, x2
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stp x10, x11, [rp,#-32]!
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PSHIFT x2, x4, cnt
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L(lo0): sub x17, x17, #1
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L(lo3): NSHIFT x10, x6, tnc
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PSHIFT x13, x7, cnt
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NSHIFT x12, x7, tnc
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cbnz x17, L(top)
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L(end): orr x10, x10, x13
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orr x11, x12, x2
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PSHIFT x2, x6, cnt
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stp x10, x11, [rp,#-16]
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str x2, [rp,#-24]
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ret
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EPILOGUE()
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