vasilito
ff4ff35918
Red Bear OS is a full fork. All sources must be available from git clone with zero network access. Removed gitignore rules that excluded fetched source trees under recipes/*/source/, local/recipes/kde/*/source/, local/recipes/qt/*/source/, and vendor source trees. Build artifacts (target/, build/, source.tar, *.o, *.so) remain excluded. 127291 files added — kernel, relibc, base, bootloader, pkgar, all KDE/Qt frameworks, mesa, wayland, DRM drivers, and every other recipe source.
95 lines
2.3 KiB
NASM
95 lines
2.3 KiB
NASM
dnl ARM mpn_mul_1 -- Multiply a limb vector with a limb and store the result
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dnl in a second limb vector.
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dnl Contributed by Robert Harley.
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dnl Copyright 1998, 2000, 2001, 2003, 2012 Free Software Foundation, Inc.
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dnl This file is part of the GNU MP Library.
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dnl
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dnl The GNU MP Library is free software; you can redistribute it and/or modify
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dnl it under the terms of either:
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dnl
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dnl * the GNU Lesser General Public License as published by the Free
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dnl Software Foundation; either version 3 of the License, or (at your
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dnl option) any later version.
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dnl
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dnl or
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dnl
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dnl * the GNU General Public License as published by the Free Software
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dnl Foundation; either version 2 of the License, or (at your option) any
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dnl later version.
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dnl
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dnl or both in parallel, as here.
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dnl
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dnl The GNU MP Library is distributed in the hope that it will be useful, but
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dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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dnl for more details.
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dnl
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dnl You should have received copies of the GNU General Public License and the
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dnl GNU Lesser General Public License along with the GNU MP Library. If not,
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dnl see https://www.gnu.org/licenses/.
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include(`../config.m4')
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C cycles/limb
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C StrongARM 6-8
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C XScale ?
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C Cortex-A7 ?
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C Cortex-A8 ?
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C Cortex-A9 4.75
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C Cortex-A15 ?
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C We should rewrite this along the lines of addmul_1.asm. That should save a
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C cycle on StrongARM, and several cycles on XScale.
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define(`rp',`r0')
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define(`up',`r1')
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define(`n',`r2')
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define(`vl',`r3')
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ASM_START()
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PROLOGUE(mpn_mul_1)
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stmfd sp!, { r8, r9, lr }
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ands r12, n, #1
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beq L(skip1)
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ldr lr, [up], #4
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umull r9, r12, lr, vl
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str r9, [rp], #4
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L(skip1):
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tst n, #2
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beq L(skip2)
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mov r8, r12
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ldmia up!, { r12, lr }
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mov r9, #0
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umlal r8, r9, r12, vl
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mov r12, #0
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umlal r9, r12, lr, vl
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stmia rp!, { r8, r9 }
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L(skip2):
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bics n, n, #3
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beq L(rtn)
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stmfd sp!, { r6, r7 }
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L(top): mov r6, r12
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ldmia up!, { r8, r9, r12, lr }
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ldr r7, [rp, #12] C cache allocate
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mov r7, #0
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umlal r6, r7, r8, vl
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mov r8, #0
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umlal r7, r8, r9, vl
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mov r9, #0
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umlal r8, r9, r12, vl
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mov r12, #0
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umlal r9, r12, lr, vl
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subs n, n, #4
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stmia rp!, { r6, r7, r8, r9 }
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bne L(top)
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ldmfd sp!, { r6, r7 }
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L(rtn): mov r0, r12
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ldmfd sp!, { r8, r9, pc }
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EPILOGUE()
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