84ad6dea95
v5.4 supersedes v5.3. Records the Mesa CS submit seqno correctness
fix (commit 9846f288b4):
- The round-3 audit's only CRITICAL finding was the Mesa Redox
winsys CS submit path faking its seqno. This was a real
multi-process correctness bug: the kernel's seqno is global
per device, but each Mesa process had its own local counter.
Fence waits between processes would never complete.
- Fix follows the standard DRM bidirectional-ioctl pattern.
Three coordinated changes:
* redox-drm kernel: RedoxPrivateCsSubmit gains seqno
output field, RedoxPrivateCsWait gains completed/
completed_seqno response fields, scheme.rs writes the
response back into the same struct passed to drmIoctl.
* Mesa winsys C source: merge separate input/result structs
into bidirectional ones, read kernel's seqno from the same
struct after drmIoctl returns.
* Durability via local/patches/mesa/26-cs-submit-bidirectional-seqno.patch
(135 lines, new) added to Mesa recipe's patches list.
- Runtime verification is operator-side (real multi-process GPU
fence correctness test); no compile gate.
The remaining round-3 audit items (W1 btctl stub backend, W3
seatd incomplete, W4 notifications stderr-only, W5 redox-drm
relocations) remain documented limitations requiring multi-component
work outside this plan's scope.