vasilito
7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
7 lines
234 B
Plaintext
7 lines
234 B
Plaintext
## Ansible Vault files
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0 string $ANSIBLE_VAULT Ansible Vault text
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>&1 regex/1l [0-9]+(\.[0-9]+)+ \b, version %s
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>>&1 regex/1l [^;]+$ \b, using %s encryption
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!:mime application/ansible-vault
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!:strength +60
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