vasilito
34360e1e4f
P0-P2: Barrier SMP, sigmask/pthread_kill races, robust mutexes, RT scheduling, POSIX sched API P3: PerCpuSched struct, per-CPU wiring, work stealing, load balancing, initial placement P4: 64-shard futex table, REQUEUE, PI futexes (LOCK_PI/UNLOCK_PI/TRYLOCK_PI), robust futexes, vruntime tracking, min-vruntime SCHED_OTHER selection P5: setpriority/getpriority, pthread_setaffinity_np, pthread_setname_np, pthread_setschedparam (Redox) P6: Cache-affine scheduling (last_cpu + vruntime bonus), NUMA topology kernel hints + numad userspace daemon Stability fixes: make_consistent stores 0 (dead TID fix), cond.rs error propagation, SPIN_COUNT adaptive spinning, Sys::open &str fix, PI futex CAS race, proc.rs lock ordering, barrier destroy Patches: 33 kernel + 58 relibc patches, all tracked in recipes Docs: KERNEL-SCHEDULER-MULTITHREAD-IMPROVEMENT-PLAN.md updated, SCHEDULER-REVIEW-FINAL.md created Architecture: NUMA topology parsing stays userspace (numad daemon), kernel stores lightweight NumaTopology hints
69 lines
1.9 KiB
Diff
69 lines
1.9 KiB
Diff
diff --git a/src/numa.rs b/src/numa.rs
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new file mode 100644
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index 0000000..40c5a06
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--- /dev/null
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+++ b/src/numa.rs
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@@ -0,0 +1,62 @@
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+/// NUMA topology hints for the kernel scheduler.
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+/// NUMA discovery (SRAT/SLIT parsing) is performed by a userspace daemon
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+/// (numad) via /scheme/acpi/, then pushed to the kernel via scheme:numa.
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+/// The kernel stores a lightweight copy for O(1) scheduling lookups.
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+use crate::cpu_set::{LogicalCpuId, LogicalCpuSet};
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+use core::sync::atomic::{AtomicBool, Ordering};
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+
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+const MAX_NUMA_NODES: usize = 8;
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+
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+#[derive(Clone, Debug)]
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+pub struct NumaHint {
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+ pub node_id: u8,
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+ pub cpus: LogicalCpuSet,
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+}
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+
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+pub struct NumaTopology {
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+ pub nodes: [Option<NumaHint>; MAX_NUMA_NODES],
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+ pub initialized: AtomicBool,
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+}
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+
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+impl NumaTopology {
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+ pub const fn new() -> Self {
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+ const NONE: Option<NumaHint> = None;
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+ Self {
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+ nodes: [NONE; MAX_NUMA_NODES],
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+ initialized: AtomicBool::new(false),
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+ }
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+ }
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+
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+ pub fn node_for_cpu(&self, cpu: LogicalCpuId) -> Option<u8> {
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+ for node in self.nodes.iter().flatten() {
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+ if node.cpus.contains(cpu) {
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+ return Some(node.node_id);
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+ }
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+ }
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+ None
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+ }
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+
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+ pub fn same_node(&self, cpu1: LogicalCpuId, cpu2: LogicalCpuId) -> bool {
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+ self.node_for_cpu(cpu1) == self.node_for_cpu(cpu2)
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+ }
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+}
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+
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+static mut NUMA_TOPOLOGY: NumaTopology = NumaTopology::new();
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+
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+pub fn topology() -> &'static NumaTopology {
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+ unsafe { &NUMA_TOPOLOGY }
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+}
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+
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+pub fn init_default() {
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+ let topo = topology();
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+ if topo.initialized.swap(true, Ordering::AcqRel) {
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+ return;
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+ }
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+ unsafe {
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+ let topo_mut = &mut *core::ptr::addr_of_mut!(NUMA_TOPOLOGY);
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+ topo_mut.nodes[0] = Some(NumaHint {
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+ node_id: 0,
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+ cpus: LogicalCpuSet::all(),
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+ });
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+ }
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+}
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