diff --git a/drivers/audio/ac97d/src/main.rs b/drivers/audio/ac97d/src/main.rs index 641e3ef2..5878bf2d 100644 --- a/drivers/audio/ac97d/src/main.rs +++ b/drivers/audio/ac97d/src/main.rs @@ -22,8 +22,20 @@ fn daemon(daemon: daemon::Daemon, pcid_handle: PciFunctionHandle) -> ! { let mut name = pci_config.func.name(); name.push_str("_ac97"); - let bar0 = pci_config.func.bars[0].expect_port(); - let bar1 = pci_config.func.bars[1].expect_port(); + let bar0 = match pci_config.func.bars[0].try_port() { + Some(port) => port, + None => { + eprintln!("ac97d: BAR 0 is not a port BAR"); + std::process::exit(1); + } + }; + let bar1 = match pci_config.func.bars[1].try_port() { + Some(port) => port, + None => { + eprintln!("ac97d: BAR 1 is not a port BAR"); + std::process::exit(1); + } + }; let irq = pci_config .func diff --git a/drivers/graphics/ihdgd/src/device/mod.rs b/drivers/graphics/ihdgd/src/device/mod.rs index ced9dd56..0423c617 100644 --- a/drivers/graphics/ihdgd/src/device/mod.rs +++ b/drivers/graphics/ihdgd/src/device/mod.rs @@ -246,7 +246,7 @@ impl Device { }; let gttmm = { - let (phys, size) = func.bars[0].expect_mem(); + let (phys, size) = func.bars[0].try_mem().ok_or_else(|| Error::new(ENODEV))?; Arc::new(MmioRegion::new( phys, size, @@ -255,7 +255,7 @@ impl Device { }; log::info!("GTTMM {:X?}", gttmm); let gm = { - let (phys, size) = func.bars[2].expect_mem(); + let (phys, size) = func.bars[2].try_mem().ok_or_else(|| Error::new(ENODEV))?; MmioRegion::new(phys, size, common::MemoryType::WriteCombining)? }; log::info!("GM {:X?}", gm); diff --git a/drivers/pcid/src/driver_interface/bar.rs b/drivers/pcid/src/driver_interface/bar.rs index b2c1d35b..dea0dce4 100644 --- a/drivers/pcid/src/driver_interface/bar.rs +++ b/drivers/pcid/src/driver_interface/bar.rs @@ -29,27 +29,22 @@ impl PciBar { } } - pub fn expect_port(&self) -> u16 { + pub fn try_port(&self) -> Option { match *self { - PciBar::Port(port) => port, - PciBar::Memory32 { .. } | PciBar::Memory64 { .. } => { - panic!("expected port BAR, found memory BAR"); - } - PciBar::None => panic!("expected BAR to exist"), + PciBar::Port(port) => Some(port), + _ => None, } } - pub fn expect_mem(&self) -> (usize, usize) { + pub fn try_mem(&self) -> Option<(usize, usize)> { match *self { - PciBar::Memory32 { addr, size } => (addr as usize, size as usize), - PciBar::Memory64 { addr, size } => ( - addr.try_into() - .expect("conversion from 64bit BAR to usize failed"), - size.try_into() - .expect("conversion from 64bit BAR size to usize failed"), - ), - PciBar::Port(_) => panic!("expected memory BAR, found port BAR"), - PciBar::None => panic!("expected BAR to exist"), + PciBar::Memory32 { addr, size } => Some((addr as usize, size as usize)), + PciBar::Memory64 { addr, size } => { + let addr_usize = addr.try_into().ok()?; + let size_usize = size.try_into().ok()?; + Some((addr_usize, size_usize)) + } + _ => None, } } } diff --git a/drivers/pcid/src/driver_interface/mod.rs b/drivers/pcid/src/driver_interface/mod.rs index 7cecaa56..8776dd4a 100644 --- a/drivers/pcid/src/driver_interface/mod.rs +++ b/drivers/pcid/src/driver_interface/mod.rs @@ -457,7 +457,13 @@ impl PciFunctionHandle { if let Some(mapped_bar) = mapped_bar { mapped_bar } else { - let (bar, bar_size) = self.config.func.bars[bir as usize].expect_mem(); + let (bar, bar_size) = match self.config.func.bars[bir as usize].try_mem() { + Some(bar) => bar, + None => { + log::error!("pcid: BAR {bir} is not a memory BAR"); + process::exit(1); + } + }; let ptr = match unsafe { common::physmap( diff --git a/drivers/pcid/src/driver_interface/msi.rs b/drivers/pcid/src/driver_interface/msi.rs index 0ca68ec5..e7e3f082 100644 --- a/drivers/pcid/src/driver_interface/msi.rs +++ b/drivers/pcid/src/driver_interface/msi.rs @@ -80,8 +80,20 @@ impl MsixInfo { let pba_offset = self.pba_offset as usize; let pba_min_length = table_size.div_ceil(8); - let (_, table_bar_size) = bars[self.table_bar as usize].expect_mem(); - let (_, pba_bar_size) = bars[self.pba_bar as usize].expect_mem(); + let (_, table_bar_size) = match bars[self.table_bar as usize].try_mem() { + Some(bar) => bar, + None => { + log::error!("MSI-X table BAR {} is not a memory BAR", self.table_bar); + return; + } + }; + let (_, pba_bar_size) = match bars[self.pba_bar as usize].try_mem() { + Some(bar) => bar, + None => { + log::error!("MSI-X PBA BAR {} is not a memory BAR", self.pba_bar); + return; + } + }; // Ensure that the table and PBA are within the BAR. diff --git a/drivers/storage/ided/src/main.rs b/drivers/storage/ided/src/main.rs index 4197217d..9615710b 100644 --- a/drivers/storage/ided/src/main.rs +++ b/drivers/storage/ided/src/main.rs @@ -43,7 +43,13 @@ fn daemon(daemon: daemon::Daemon, pcid_handle: PciFunctionHandle) -> ! { // Get controller DMA capable let dma = pci_config.func.full_device_id.interface & 0x80 != 0; - let busmaster_base = pci_config.func.bars[4].expect_port(); + let busmaster_base = match pci_config.func.bars[4].try_port() { + Some(port) => port, + None => { + log::error!("ided: BAR 4 is not a port BAR"); + std::process::exit(1); + } + }; let (primary, primary_irq) = if pci_config.func.full_device_id.interface & 1 != 0 { panic!("TODO: IDE primary channel is PCI native"); } else { diff --git a/drivers/vboxd/src/main.rs b/drivers/vboxd/src/main.rs index bcb9bb15..52328e79 100644 --- a/drivers/vboxd/src/main.rs +++ b/drivers/vboxd/src/main.rs @@ -199,7 +199,13 @@ fn daemon(daemon: daemon::Daemon, mut pcid_handle: PciFunctionHandle) -> ! { let mut name = pci_config.func.name(); name.push_str("_vbox"); - let bar0 = pci_config.func.bars[0].expect_port(); + let bar0 = match pci_config.func.bars[0].try_port() { + Some(port) => port, + None => { + eprintln!("vboxd: BAR 0 is not a port BAR"); + std::process::exit(1); + } + }; let irq = pci_config .func diff --git a/drivers/virtio-core/src/probe.rs b/drivers/virtio-core/src/probe.rs index 5631ef67..06f0ba1a 100644 --- a/drivers/virtio-core/src/probe.rs +++ b/drivers/virtio-core/src/probe.rs @@ -55,7 +55,13 @@ pub fn probe_device(pcid_handle: &mut PciFunctionHandle) -> Result continue, } - let (addr, _) = pci_config.func.bars[capability.bar as usize].expect_mem(); + let (addr, _) = match pci_config.func.bars[capability.bar as usize].try_mem() { + Some(bar) => bar, + None => { + log::warn!("virtio-core: BAR {} is not a memory BAR, skipping capability", capability.bar); + continue; + } + }; let address = unsafe { let addr = addr + capability.offset as usize;