RISC-V convention marks PDE with no read/write/execute, so we can't have none of this flags set there. Remove their setting from PDE handling code and instead set them as appropriate in arch-specific defaults.
Also enable both readonly and readwrite flags to be non-zero (as long as their intersection completely masks both of them), as required for RISC-V PTE handling.
Before this commit, RMM assumed base physical address was presented in PTE as is, i.e. physical page address was shifted exactly to PAGE_SHIFT, so physical address can be extracted from PTE by simply masking off some bits and can be placed in PTE by simple addition/OR.
This is not the case for RISC-V which has 4Kb base page so 12 bits PAGE_SHIFT, yet physical page address is only shifted 10 bits in PTE.
This commit removes this assumption.
NOTE: This commit changes meaning of constants:
* ENTRY_ADDRESS_SIZE from "total physical size in bytes" to "total physical size in PAGES"
* ENTRY_ADDRESS_MASK from "mask of physical bits in PTE" to "mask of physical bits starting at bit 0"
This is required for RISC-V. Privileged spec says:
> For non-leaf PTEs, the D, A, and U bits are reserved for future standard use.
> Until their use is defined by a standard extension, they must be cleared by software
> for forward compatibility.
QEMU fails address translation if it sees any of these flags set on non-leaf page entry.
I tested compiling the kernel with a more recent rustc, and this
triggered UB. Don't know for sure why there was an invalid entry passed
to the kernel, but it did.
This would allow logd to write all received log messages to debug:
without causing an infinite loop when it at the same time reads all
messages in sys:log.
Diagonal as in
Thread A Thread B
Send to B Send to A
Wait for B Wait for A.
I haven't reproduced this bug, but this should fix it, since the wait
steps now checks the local percpu block for pending TLB shootdowns onto
itself.
Andrey Turkin