Commit Graph

2 Commits

Author SHA1 Message Date
vasilito 7686729069 drm: implement syncobj and fence for VIRGL/VirtIO driver
Extract protocol-agnostic FenceTimeline from Intel to shared
src/drivers/fence.rs — atomic-based fence tracking suitable
for Intel, VIRGL, and AMD drivers.

Extract protocol-agnostic SyncobjManager from Intel to shared
src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/
wait/query and sync_file fd export/import.

Wire both into VirtioDriver:
- Add FenceTimeline + SyncobjManager fields
- Implement all 5 GpuDriver syncobj trait methods
  (create, destroy, wait, export_fd, import_fd)
- Track fence seqnos in virgl_submit_3d (allocate
  before submit, signal after completion)

Intel fence.rs and syncobj.rs converted to thin re-export
modules pointing at shared sources — no behavioral change
for Intel driver.

This gives Mesa VIRGL userspace the standard DRM syncobj
API for GPU/compositor synchronization.
2026-06-02 14:33:28 +03:00
vasilito 1632a59b02 docs: VIRGL driver comprehensive implementation plan
6 phases, 28 tasks, ~3,600 lines, 10-16 weeks
40% code reuse from Intel driver (GEM, syncobj, fence, KMS, scheme)
Linux 7.1 reference: 16 files, 5,837 lines

Architecture map: guest Mesa → redox-drm → virtio queue → QEMU → host GPU
Reuse assessment: 35 shared files (~8,200 lines) — all protocol-agnostic
VIRGL-specific: virtio command submission, capset negotiation, GL contexts
2026-06-02 14:13:38 +03:00