bjorn3
dee230ffca
Use map_linearly in many places
2026-04-04 13:10:04 +02:00
bjorn3
50c68cd746
Remove ACPI search from the kernel
...
The bootloader provides the RSDP address to the kernel. If the
bootloader can't find it, there is no RSDP.
2026-04-04 11:50:24 +02:00
bjorn3
1352fafd00
Remove unused InactiveFlusher
2026-04-03 22:15:00 +02:00
bjorn3
ab4abf63c9
Deduplicate Page and other paging related things between architectures
2026-04-03 22:15:00 +02:00
bjorn3
b805336cfc
Fix a bunch of warnings
2026-04-03 22:15:00 +02:00
bjorn3
3cbce1b9ac
Move BSP_READY and AP_READY to platform-independent code
2026-04-02 20:29:36 +02:00
bjorn3
0f540e6f15
Don't physmap the kernel itself
...
We don't actually need to and this is a bit safer against memory corruption.
2026-04-02 20:29:36 +02:00
bjorn3
49eb21ce0e
Use KERNEL_OFFSET from linker script
2026-04-02 20:29:36 +02:00
bjorn3
dc7e823f70
Deduplicate kernel page flags
2026-04-02 20:29:36 +02:00
bjorn3
980f1c6af8
Remove unused and deduplicate identical arch specific consts
2026-04-02 20:29:36 +02:00
bjorn3
10b1ae2ecc
Remove unused arch consts
2026-04-02 20:29:36 +02:00
bjorn3
2ce7621a80
Fix a bunch of warnings masked by #[allow(unused)]
2026-04-02 20:29:36 +02:00
Wildan M
d835a3d8f0
Solve all borrow checker leaving some violation
2026-04-01 08:42:18 -06:00
Wildan M
a42ec44dbf
Partially solve borrow rules
2026-04-01 08:42:18 -06:00
Wildan M
3161a44c25
Solve borrow rules for memory.rs
2026-04-01 08:42:18 -06:00
Wildan M
55e6fe9add
Remove remnants of AddrSpace::used_by
2026-04-01 08:42:18 -06:00
Wildan M
ca2a7048d0
Move spin loop hint to crate lock
2026-04-01 08:42:18 -06:00
Wildan M
3b5a0e4c60
Apply ordered lock to AddrSpaceWrapper without solving borrow checker
2026-04-01 08:42:18 -06:00
Wildan M
2989b5375f
Add deadlock debug to AddrSpaceWrapper
2026-04-01 08:42:18 -06:00
Akshit Gaur
004509587d
Fix ForceKill
2026-04-01 13:58:27 +05:30
Wildan M
6e0143cf0d
Store context to per cpu
2026-03-31 15:29:47 +07:00
bjorn3
c8879531ae
rmm: Add device_memory and uncachable flags to PageFlags
2026-03-30 20:34:45 +02:00
bjorn3
a5fd001dcb
Use PageFlags::write_combining instead of custom flag
2026-03-30 20:34:45 +02:00
bjorn3
6b00f4ca25
Move MAIR_EL1 initialization to rmm
...
Rmm needs to know the exact MAIR_EL1 configuration to produce the
correct bits in the page table.
2026-03-30 19:26:41 +02:00
bjorn3
6e5c25b7a0
Move PAT initialization to rmm
...
Rmm needs to know the exact PAT configuration to produce the correct
bits in the page table.
2026-03-30 18:59:42 +02:00
bjorn3
c4b064ea44
Move arch specific EntryFlags into rmm
2026-03-30 18:49:15 +02:00
bjorn3
8b217edac0
Fix two unsafe block related warnings
2026-03-30 18:42:38 +02:00
bjorn3
2fc2d5897a
Fix a couple of unused import warnings
2026-03-30 18:38:25 +02:00
bjorn3
675ba2ea51
rmm: Make a couple more methods safe
2026-03-29 17:00:36 +02:00
bjorn3
c51aa1ef86
rmm: Make a couple of methods safe
2026-03-29 14:16:53 +02:00
bjorn3
a5aeea9cfc
rmm: Remove PageMapper::{map,unmap}
...
There is already (un)map_phys.
2026-03-29 14:16:53 +02:00
bjorn3
a876d66648
rmm: Reduce visibility of PageTable methods
...
This disallows direct manipulation of the page tables. Only manipulation
through PageMapper is allowed.
2026-03-29 14:16:53 +02:00
bjorn3
abf710b4a2
Move handling of kernel page table entry copying to RMM
...
This way it can ensure those page table entries never get unmapped,
ensuring they are kept in sync between all processes.
2026-03-29 14:16:53 +02:00
bjorn3
604e1729cb
Rustfmt
2026-03-29 14:16:53 +02:00
bjorn3
882007f827
Remove unused UserSlice::read_u64
...
This fixes a warning. It can always be re-introduced if we ever need it.
2026-03-29 14:16:36 +02:00
bjorn3
f5aff74fc9
Explicitly ignore field of PageQueueEntry::Other
...
This fixes a warning
2026-03-29 14:16:35 +02:00
bjorn3
b5603422be
Check at compile time that KernelMapper is writable if necessary
2026-03-28 23:22:19 +01:00
bjorn3
f8d93023dd
Fix a couple of warnings
2026-03-28 17:07:33 +01:00
Philipp Bartsch
5865ec0790
/scheme/sys/cpu: Add aarch64 feature detection
...
This only lists features from ID_AA64ISAR0_EL1 and ID_AA64ISAR1_EL1.
For other features one would have to evaluate more registers.
2026-03-26 22:15:03 +01:00
Philipp Bartsch
2d5e2b39f5
Drop extra debug print
2026-03-26 00:49:33 +01:00
Philipp Bartsch
a60cc25015
Update aarch64 implementers list
...
Two vendors were missing compared to ARM's official list.
https://developer.arm.com/documentation/ddi0601/2025-12/AArch64-Registers/MIDR-EL1--Main-ID-Register
2026-03-26 00:49:11 +01:00
Ron Williams
fde164b2a0
Revert "Deficit based Weighted Round Robin Scheduler"
...
This reverts commit b7dabfc3c2 .
2026-03-22 18:44:41 +00:00
Akshit Gaur
b7dabfc3c2
Deficit based Weighted Round Robin Scheduler
2026-03-22 07:00:31 -06:00
Wildan M
d317f84cd4
Change uname to kernel commit, Fix CI build
2026-03-17 17:51:29 +07:00
Connor-GH
d81ba0645b
/scheme/sys/uname: use commit hash instead of time for reproducibility
2026-03-15 17:21:46 -05:00
Connor-GH
ea47151757
/scheme/sys/uname: include the "version" info
...
With this change, we use the recently-added `COOKBOOK_TIME_IDENT`
environment variable at compile time to get the "version" info for the
uname scheme. This field is unspecified by POSIX what it should have,
but most kernels (including Linux, XNU, NetBSD, etc.) put the build
time here.
2026-03-15 15:53:02 -05:00
Wildan M
44b6a58032
Add more context to deadlock debug messages
2026-03-14 08:49:40 -06:00
Ibuki.O
3934ea454d
feat: Implement translation of std_fs_call to each function
2026-03-14 11:37:07 +09:00
Connor-GH
8f468ec106
syscall: remove comment about test vs bt x86 instructions
...
According to Agner Fog's documentation
(https://agner.org/optimize/instruction_tables.pdf ), the following information
is true:
These instructions have identical latency and throughput, except for Zen
5, which lists `test` as having reciprocal throughput of 0.25 cycles,
and `bt` having reciprocal throughput of 0.33 cycles. This rules out the
`bt` instruction for being the ideal instruction.
The other `test` instructions were removed as candidates because,
regardless of the size of the memory fetched at the address, at least 64
bytes will need to be fetched because it will be stored in the cache
line. The WORD and DWORD cases can be ruled out because we cannot assume
that `rsp + 16` or `rsp + 17` will not be on a 64-byte alignment
boundary, which would cause two cachelines to be essentially filled with
garbage we don't care about. The best case scenario is that we only need
to fill one cache line with garbage, which is what the BYTE version does
every time.
2026-03-12 09:41:29 -05:00
Wildan M
84754dfc5d
Solve borrow checking by downgrading waitqueue lock
2026-03-11 09:42:06 +07:00