Commit Graph

8 Commits

Author SHA1 Message Date
vasilito a52632f69d fix: bits_pthread cbindgen needs stddef.h for size_t type
The generated bits/pthread.h uses size_t but had no includes.
Also added openat cache vars to m4 recipe for gnulib cross-compilation.
2026-06-01 17:00:53 +03:00
vasilito 052be6d264 feat: intelligent platform detection for cpufreqd and coretempd
cpufreqd:
- Read CPU vendor and frequency from /scheme/sys/cpu (CPUID-based)
- Generate P-states dynamically from detected max/base frequency
- Remove hardcoded 2400-1200 kHz fallback table
- Intel SpeedStep and AMD encoding support

coretempd:
- Detect vendor from /scheme/sys/cpu before MSR probing
- Read CPU count from /scheme/sys/cpu for accuracy
- Fall back to MSR detection only when platform info unavailable
2026-06-01 11:14:52 +03:00
vasilito ad74e920ae fix: coretempd MSR probe for QEMU default machine type
On QEMU's default i440FX machine type, rdmsr on unsupported MSRs
(0x19c IA32_THERM_STATUS, 0x1a2 IA32_TEMPERATURE_TARGET) causes a
kernel #GP that kills the process. Same pattern as cpufreqd: spawn a
child with --probe-msr to test readability before the main loop. If
probe fails, disable all MSR reads and report all CPUs as Unknown.
2026-06-01 09:42:24 +03:00
vasilito 77795cfa18 fix: redbear-mini boot to login prompt + daemon hardening
- 29_activate_console.service: oneshot -> oneshot_async (unblocks init
  scheduler, enabling getty 2 -> login)
- 15_coretempd.service: oneshot_async -> {scheme="coretemp"} (init
  now correctly registers the scheme fd)
- cpufreqd: child-process MSR probe detects QEMU's lack of MSR 0x199
  and gracefully degrades to monitoring-only mode
- coretempd: notification failure is now non-fatal (WARN instead of ?)
- driver-manager: "no match entries" downgraded from warn to debug
  (infrastructure daemons intentionally have no hw match)
2026-06-01 09:02:42 +03:00
vasilito 3431bbfeb2 Fix duplicate atomic_t typedef conflicting with types.h 2026-05-31 05:50:29 +03:00
vasilito 706050482b fix: rewrite coretempd to use redox_scheme Socket + SchemeSync
Replaced broken UnixListener::bind(':coretemp') with proper redox_scheme::Socket::create() + SchemeSync trait impl. Event loop uses next_request/handle_sync/write_response pattern. Verified: registers scheme:coretemp, detects CPU info, zero panics.

Ultraworked with [Sisyphus](https://github.com/code-yeongyu/oh-my-openagent)

Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
2026-05-29 21:48:51 +03:00
vasilito e5b82a644a coretempd: Add AMD Zen temperature sensor support
Detect CPU vendor by probing MSRs (Intel IA32_THERM_STATUS vs AMD
TCTL MSR C0010293). Support both Intel Tjmax-based and AMD direct
temperature reading. Log detected vendor per CPU at startup.
2026-05-20 18:52:01 +03:00
vasilito 6ca3e47383 Add coretempd CPU temperature sensor daemon
New local recipe coretempd reads IA32_THERM_STATUS MSR via the
new sys:msr scheme and exposes per-CPU temperatures via scheme:coretemp.

- Reads IA32_THERM_STATUS (0x19C) and IA32_TEMPERATURE_TARGET (0x1A2)
- Calculates Celsius from digital readout relative to TjMax
- Exposes /scheme/coretemp/ directory with per-CPU temperature files
- Added to redbear-mini.toml (inherited by redbear-full)
- Added 15_coretempd.service init file
2026-05-20 13:46:43 +03:00