bjorn3
8f589f7b88
Disable graphical debug only once writing to the fd
...
This allows obtaining an fd for this before calling setrens while doing
the actual disabling after calling it.
2025-04-06 17:13:26 +02:00
4lDO2
81374e6f7b
Add support for CallFlags::CONSUME.
2025-04-06 15:50:32 +02:00
4lDO2
ef5de94150
Use sys scheme for kstop rather than signals.
2025-03-31 14:59:00 +02:00
4lDO2
92fcb4472b
Use more reliable triple fault for emerg..._reset.
2025-03-31 14:58:05 +02:00
4lDO2
3ae117b812
Outsource x86 RTC handling to rtcd.
2025-03-30 15:28:25 +02:00
bjorn3
23fd308745
Reduce verbosity of debug logs during booting
...
A bunch of things are now printed a bit more compactly or without
interleaving of logs on a single line. Also a bunch of not that useful
logs are no longer printed by default at all.
2025-03-15 20:52:06 +01:00
bjorn3
81210b9ed0
Update and re-enable the legacy scheme deprecation warnings
...
I've tested booting, several cosmic apps and netsurf as not causing any
warning with the new set of exclusions and all my recent MR's merged.
2025-03-13 18:51:37 +01:00
Jacob Lorentzon
4607576006
Implement bidirectional SYS_CALL support
2025-03-03 23:21:56 +00:00
Ron Williams
ba613ce628
Nanosleep: Return time remaining after interrupt
2025-02-26 21:00:23 +00:00
Majoneza
06f2c93140
chore: validate_region return PageSpan
...
Changed validate_region function to return PageSpan instead of a tuple. All the code
using validate_region function was updated to use PageSpan as well.
2025-02-25 23:38:38 +01:00
Vincent Berthier
2da88c18c0
Add the sys:stat scheme
2025-02-22 14:27:10 +00:00
4lDO2
84632ab708
Disable warning when opening "old" schemes.
2025-02-21 16:56:53 +01:00
4lDO2
ef0758b9cc
Always use close message when available.
2025-02-21 16:50:16 +01:00
4lDO2
7295777985
Add one-way close message for schemes.
2025-02-21 15:56:05 +01:00
4lDO2
f044ffb03b
Remove stable #![feature] and most x86_64 static mut.
2025-02-21 14:16:58 +01:00
4lDO2
09eaf12201
Add optional fdstat sys scheme statistic.
2025-02-19 11:55:18 +01:00
Anhad Singh
79de74bf3a
fix(scheme/itimer): wrong chunk size
...
Chunk size of the scheme (`size_of::<ITimerScheme>() == 0`) was being
provided instead of `size_of::<ITimerSpec>()`. This resulted in a kernel
panic (division by zero) when kread was called for this scheme.
Signed-off-by: Anhad Singh <andypython@protonmail.com >
2025-01-16 03:10:01 +00:00
Jeremy Soller
668a123b9a
Switch to naked_asm
2025-01-14 15:59:07 -07:00
Andrey Turkin
7db6667e6b
Better parsing of IRQ specifications in DTB
...
Fixes Raspberry 3B+ DTB parsing (as generated by Qemu)
2024-12-18 21:11:46 +03:00
Andrey Turkin
7f38f51b20
dtb: Apply bus mappings
2024-12-18 21:11:46 +03:00
Zhouqi Jiang
52763e7e70
arch: riscv64: use sbi-rt crate to process SBI calls, save code sizes
2024-12-18 14:06:08 +00:00
Anhad Singh
af36ae12b0
fix(mremap): fix referencing
...
Before it was first add_ref'ed by `borrow_frame_enforce_rw_allocated`,
manually and then by `allocated_shared_one_page`.
Now it is only done by `borrow_frame_enforce_rw_allocated` and does not
get unref-ed as take() is called on the returned `RaiiFrame`.
Now the page is manually mapped and an `Allocated` type grant is
constructed (synonymous to `MAP_PRIVATE`). Before by using `allocated_shared_one_page`
an `AllocatedShared` provided grant was constructed (synonymous to
`MAP_SHARED`), which was wrong as the TCB would've not got CoW-ed
after fork(), making the Tcb malformed.
Signed-off-by: Anhad Singh <andypython@protonmail.com >
2024-12-11 16:37:01 +11:00
Anhad Singh
08231eb4df
feat(mremap): KEEP_OLD
...
Signed-off-by: Anhad Singh <andypython@protonmail.com >
Co-authored-by: @4lDO2
2024-12-11 16:08:08 +11:00
Andrey Turkin
7af6dd1f88
Restore riscv,plic0 compatible check
2024-11-07 05:09:24 +03:00
Andrey Turkin
9fe8f759af
Fix formatting and a warning
2024-11-06 12:13:13 +03:00
Andrey Turkin
ee89d02282
Change PLIC compatible string from riscv,plic0 to sifive,plic-1.0.0
...
Former one is deprecated and apparently only used by QEMU. Latter is used by QEMU as well as others.
2024-11-06 12:09:36 +03:00
Jeremy Soller
99fbdf426c
Fix assumption that CPU ID must equal APIC ID
2024-11-04 14:46:46 -07:00
Andrey Turkin
7b1d135057
Use redoxer for CI jobs
2024-11-01 06:51:13 +03:00
Jeremy Soller
4db9673e2a
Support SPCR and clean up device memory allocation
2024-10-31 10:53:58 -06:00
Arthur Paulino
e19c1404f7
chore: enrich context/switch
...
* Add documentation and more code comments to `src/context/switch.rs`
* Eliminate a `context.wake.expect(...)` where `context.wake.is_some()`
* Eliminate a TODO item about updating contexts' timestamps in `switch_to`
* Eliminate a dangling `else { continue }` at the end of the loop that iterates
on contexts
2024-10-31 10:22:21 +00:00
Jeremy Soller
df9db9291a
Fix AP CPU ID on newer Intel CPUs
2024-10-30 21:09:06 -06:00
Jeremy Soller
9b6d1549b5
Support GTDT for aarch64
2024-10-30 18:17:11 -06:00
Jeremy Soller
34a6a441f1
Initial aarch64 ACPI support
2024-10-30 16:16:24 -06:00
Jeremy Soller
b221bb6c51
Make it possible to boot aarch64 with invalid DTB
2024-10-30 12:34:50 -06:00
Jeremy Soller
4dd6a26742
Make it possible to compile acpi system on any arch
2024-10-30 11:43:21 -06:00
Jeremy Soller
939c9567ee
Support 16550 uarts for aarch64 debug output
2024-10-29 14:06:00 -06:00
Jeremy Soller
161e578f29
Use null driver for unknown IRQ controllers on aarch64
2024-10-29 08:01:38 -06:00
Jeremy Soller
380532aea5
Improve reliability of aarch64 startup code
2024-10-29 08:00:57 -06:00
Jeremy Soller
15b0133b7b
Add arm,gic-400 support to GIC driver
2024-10-29 08:00:17 -06:00
Jeremy Soller
e4e55103ad
Remove old aarch64 asm code
2024-10-29 07:59:12 -06:00
Arthur Paulino
ea0356b26a
Address minor warts
...
* Mention the need to have `nasm` available on the PATH in the README
* Replace the deprecated `hide_parse_errors` by `show_parse_errors` in `rustfmt.toml`
* Mark unused variables in `src/scheme/proc.rs`
2024-10-27 18:14:12 -03:00
Andrey Turkin
505425bec9
Expose riscv64/aarch64 legacy irqs (requiring remapping) to the irq scheme
2024-10-22 20:26:40 +03:00
Andrey Turkin
cba02a26fa
Rework irqchip to support risc-v irqs, and add risc-v irq chips handling
2024-10-22 19:16:21 +03:00
Andrey Turkin
906259c024
Pull irqchip from aarch64 code into more generic place
2024-10-21 19:56:32 +03:00
Andrey Turkin
1921c6814b
Initial RISC-V implementation
...
Has no IRQ handling yet
2024-10-20 16:24:21 +03:00
Andrey Turkin
db32f5f7a3
Move some conditionally compiled code from common files into arch-gated files
2024-10-19 21:59:14 +03:00
Andrey Turkin
55041e2eeb
Use a custom config flag to conditionally compile DTB-specific areas
...
Would be great if we could use a feature instead, but Cargo can't do target-specific defaults features
2024-10-19 21:03:43 +03:00
Andrey Turkin
0a6a90415a
Refactor initial memory paging
2024-10-19 08:44:46 +03:00
James
3fbd52a212
Made a change in context to the way arrays are resized. Slight change to the logic but resize_with should be slightly more efficient
2024-10-15 21:24:32 +11:00
Ron Williams
865122e92f
Fix serial console login
2024-10-10 18:45:14 +00:00