Commit Graph

16 Commits

Author SHA1 Message Date
vasilito 0046efb009 sync in-house crate versions to 0.3.0 and bump kernel/relibc/syscall submodules 2026-07-08 18:34:22 +03:00
vasilito b8aac3c9bc D7: editor multi-cursor support
Add secondary_cursors field to Editor with insert_char_multi,
delete_back_multi, delete_forward_multi methods. Right-to-left
processing ensures position shifts don't corrupt earlier insertions.

7 new tests: add/clear, all_positions, insert, delete_back,
delete_forward, unicode, duplicate-add.
2026-07-05 22:29:19 +03:00
vasilito 7902864a32 version(0.2.5): bump project version to 0.2.5
- Cookbook Cargo.toml: 0.1.0 → 0.2.5
- All 61 in-house crate Cargo.toml versions: 0.2.4 → 0.2.5
- os-release.in: fix URLs from github.com to gitea.redbearos.org
- sync-versions.sh --check passes with zero drift

The OS version is derived from the git branch name at build time.
Building on branch 0.2.5 produces os-release with VERSION_ID=0.2.5.
2026-07-02 15:36:28 +03:00
vasilito 4ded365124 cpufreqd: only log transitions that actually happened; skip dwell on read-only
In read-only mode (detected VM/QEMU/KVM) apply_pstate is a no-op
so c.current_idx never advances. The previous log line was
emitted whenever the *requested* target (n) differed from
current_idx, regardless of whether the write actually fired —
on QEMU that produced thousands of P0->P1 lines per boot even
though no transition ever took place.

Gate the info!() on whether current_idx actually changed. Also
skip the dwell accumulation entirely on read-only hosts: writes
cannot take effect, so the hysteresis counter is meaningless.
The governor still tracks the target so the load value
reflects real demand, but no work fires per poll.

Closes Phase H of the LG Gram 16 (2025) S/P-state work.
2026-07-01 00:03:32 +03:00
vasilito 68b1f74dbf cpufreqd: correct VM detection paths (Redox DMI + CPUID hypervisor bit)
The earlier commit (6d1b11726) read /sys/class/dmi/id/sys_vendor
and /sys/class/dmi/id/product_name. Those are the Linux paths.
Redox exposes SMBIOS fields at /scheme/acpi/dmi/<field> via the
acpid userspace daemon. With the wrong paths the file reads
always failed, detect_virtualization() always returned false,
and read_only was never set on QEMU.

Now we read /scheme/acpi/dmi/sys_vendor and product_name (the
Redox-correct paths), and as a fallback when SMBIOS is absent
or uninformative we check the CPUID hypervisor-present bit
(leaf 1 ECX bit 31) via inline assembly. The CPUID pattern
mirrors local/recipes/system/redbear-power/source/src/cpuid.rs:168
which already uses this bit for the same purpose.

When either signal indicates virtualization, every CpuInfo is
constructed with read_only = true and apply_pstate() short-
circuits at the top. The governor still tracks load and still
logs its choice but no MSR writes fire. On bare metal the
existing path is preserved exactly.

The companion kernel fix in local/sources/kernel (commit
c2312627 on master) corrects a path-strip bug in the sys
scheme dispatcher that was preventing every MSR open from
succeeding with ENOENT. With both fixes together, cpufreqd
on QEMU enters read-only mode and the Ondemand governor stops
the P0->P1->P0 oscillation.
2026-06-30 23:58:33 +03:00
vasilito 6d1b117264 cpufreqd: detect virtualized host, skip MSR writes on QEMU/VM
QEMU's PIIX4 emulation does not model IA32_PERF_STATUS, so the
dwell counter cannot confirm a state transition actually took
effect and the governor oscillates P0<->P1 on idle. On a real
hypervisor (QEMU/KVM, VMware, VirtualBox, Hyper-V, Xen) the MSR
writes are also typically no-ops on the underlying emulation.

detect_virtualization() reads /sys/class/dmi/id/sys_vendor and
product_name. If the system vendor contains 'qemu', 'kvm',
'vmware', 'virtualbox', 'hyper-v', or 'xen', CpuInfo is
constructed with read_only=true and apply_pstate() short-
circuits at the top: the load value is still tracked and the
governor still logs its choice, but no MSR writes fire. On
real hardware (LG Gram 2025, etc.) the existing behavior is
preserved exactly.

The redundant DWELL_CYCLES constant is removed (DWELL_POLLS
already serves that role).

Phase H of CONSOLE-TO-KDE-DESKTOP-PLAN.md.
2026-06-30 22:26:06 +03:00
vasilito 5780fbc1ce cpufreqd: auto-detect virtualization for MSR read-only mode 2026-06-30 22:23:00 +03:00
vasilito 3e57b52a2d cpufreqd: add MSR readback and hysteresis to prevent P-state thrashing 2026-06-30 22:20:04 +03:00
Red Bear OS d24d0e2174 cpufreqd: add HWP (Hardware P-states / Intel Speed Shift) detection
Phase G.2 of the ACPI/Arrow Lake port. The LG Gram 2025 (Core Ultra 7
255H, Arrow Lake-H) uses Intel HWP for P-state control — legacy
IA32_PERF_CTL writes are silently ignored when HWP is active.

The previous cpufreqd always wrote IA32_PERF_CTL (MSR 0x199), which
on Arrow Lake-H had zero effect. We now:

1. Detect HWP at startup by reading IA32_PM_ENABLE (MSR 0x770) bit 0
2. If HWP is active:
   a. Read IA32_HWP_CAPABILITIES (MSR 0x771) for the
      min/max/guaranteed/efficient performance range
   b. Translate the governor's P-state index into the HWP
      "Desired Performance" field + EPP hint
   c. Write IA32_HWP_REQUEST (MSR 0x774) instead of IA32_PERF_CTL
3. If HWP is not active, fall back to the legacy IA32_PERF_CTL path
   (preserves backward compatibility for older CPUs)

The kernel's new /scheme/sys/msr/ scheme (Phase G.1) provides the
in-memory storage backing the MSR reads/writes. On the real LG Gram
2025 hardware, the kernel's MSR scheme will be wired to the actual
hardware MSRs (Phase G+ work); the cpufreqd interface is unchanged.

HWP layout (Intel SDM Vol 3B §14.4.4):
  [7:0]    Minimum Performance
  [15:8]   Maximum Performance
  [23:16] Desired Performance
  [31:24] Energy-Performance Preference (EPP)
  [42:32] Activity Window (0 = auto)
  [42]    Package Control

EPP follows the same index as desired perf: 0 = performance,
255 = power-save. We map the linear P-state index to both the
"Desired Performance" and EPP so the H/W sees a single hint that
the OS wants both the performance and energy level it implies.

Includes:
- PstateMode enum (LegacyPerfCtl | Hwp) for compile-time dispatch
- detect_pstate_mode() reads MSR 0x770
- read_hwp_capabilities() reads MSR 0x771, returns (min, max,
  guaranteed, efficient) bytes
- hwp_request_for() maps P-state index to IA32_HWP_REQUEST u64
- apply_pstate() dispatches to the right MSR based on ci.mode
- The /scheme/cpufreq/state output now tags each CPU with [HWP] or
  [legacy] for observability

Hardware test plan: on the LG Gram 2025, "performance" governor
should pin IA32_HWP_REQUEST.Desired = hwp_max with EPP=0; "powersave"
should pin it to hwp_min with EPP=255; "ondemand" should ramp
between. Reading IA32_PERF_STATUS (MSR 0x198) via /scheme/sys/msr
should reflect the new operating point within ~1ms.
2026-06-30 12:53:57 +03:00
vasilito 909cce0f5d cpufreqd, redbear-power: read CPU count from /scheme/sys/cpu
On Redox the kernel's sys:cpu scheme is a single file (kernel/src/scheme/
sys/cpu.rs) whose contents start with 'CPUs: N\n', not a per-CPU directory.
The kernel does not create /dev/cpu/ at all, so the prior read_dir-based
enumeration always fell through to the single-CPU fallback on Redox —
hiding the fact that the kernel had successfully brought up the APs and
reporting only CPU 0 to the governor / power TUI.

Read /scheme/sys/cpu and parse the 'CPUs:' line first; fall back to
/dev/cpu/ for Linux hosts.
2026-06-28 16:26:30 +03:00
vasilito 8af119d1a9 Remove duplicate redbear-netctl-console recipe (nested inside redbear-netctl) 2026-06-28 00:01:47 +03:00
vasilito 04b7641e85 config: add x11proto dependency for libxau and SDDM
- Add x11proto to redbear-full.toml package list
- libxau recipe updated with x11proto dependency and custom build script
- Fixes libxau build failure: 'Package xproto was not found'
2026-06-20 14:57:46 +03:00
vasilito eaf8e89785 recipes: bump redox_syscall 0.7 → 0.8 in all Red Bear recipes
Aligns all Red Bear custom recipe dependencies with the syscall 0.8.x
version used by the upstream-synced base and relibc forks.

Author: vasilito <adminpupkin@gmail.com>
2026-06-18 21:36:21 +03:00
vasilito b723b276f5 fix: cpufreqd MSR spam, udev-shim PCI spam, scheme throttle, keymaps dir
- cpufreqd: suppress MSR errors after 1 failure (was 10)
- udev-shim: demote PCI scan failures from WARN to DEBUG
- accessibility/ime/keymapd: throttle EBADF loop with 100ms sleep
- config: create /etc/keymaps directory for keymapd
2026-05-04 14:28:19 +01:00
vasilito 48ec92b486 fix: udev-shim panic, sessiond duplicate, scheme Bad-fd handling
- udev-shim: replace .expect() with graceful errors (no more panic on Broken pipe)
- P4-initfs: remove duplicate sessiond (conflicted with config)
- accessibility/ime/keymapd: break instead of exit(1) on EBADF
- P6 driver patches rebased
- Docs: archive old reports, add implementation master plan
2026-05-04 14:04:03 +01:00
vasilito a140014226 feat: recipe durability guard — prevents build system from deleting local recipes
Add guard-recipes.sh with four modes:
- --verify: check all local/recipes have correct symlinks into recipes/
- --fix: repair broken symlinks (run before builds)
- --save-all: snapshot all recipe.toml into local/recipes/
- --restore: recreate all symlinks from local/recipes/ (run after sync-upstream)

Wired into apply-patches.sh (post-patch) and sync-upstream.sh (post-sync).
This prevents the build system from deleting recipe files during
cargo cook, make distclean, or upstream source refresh.
2026-04-30 18:47:03 +01:00