Jeremy Soller
8130e4752b
Map TSS using RMM
2021-05-07 09:13:25 -06:00
Jeremy Soller
77f6887fbc
Debug use of memory map and env data
2021-05-07 08:54:36 -06:00
Jeremy Soller
38f7884e21
Improvements for aarch64 serial driver on real hardware
2021-05-06 21:25:15 -06:00
4lDO2
36b3a4a49e
Add KERNEL_PERCPU_PML4 on AArch64.
2021-05-06 21:22:48 +02:00
4lDO2
558109a9cb
Put the KPCRs in high memory, in their own PML4.
...
This also removes the need to do another semi-expensive remap when
cloning processes, since the KPCRs (for kernel TLS) are no longer stored
in the user PML4.
2021-05-06 21:21:37 +02:00
Jeremy Soller
2e38fab913
Do not hardcode aarch64 uart
2021-05-06 13:16:50 -06:00
4lDO2
9b4ce0d0cc
WIP: Fix userspace ACPI shutdown.
2021-05-06 19:49:58 +02:00
4lDO2
7ac5bdbae0
WIP: Implement userspace-driven shutdown.
2021-05-06 19:49:58 +02:00
4lDO2
bea6747643
Move all AML code to userspace.
...
Currently, there are some things that need to be set up by userspace
that the kernel previously did. These include telling firmware when the
I/O APIC is used, and most importantly, shutting down the system.
The former is not particularly important, but for the latter I think
that we could implement this using a "shutdown pipe". Essentially it
will be a file that triggers an event shutting down, which would be used
to notify to acpid that the kernel is requesting a shutdown.
2021-05-06 19:49:57 +02:00
Jeremy Soller
46a364471c
Re-init aarch64 serial port for interrupts
2021-05-05 20:46:51 -06:00
Jeremy Soller
b9a89f2160
More fixes for building aarch64
2021-05-03 22:07:40 -06:00
Jeremy Soller
8f50785781
Fixes for building aarch64
2021-05-03 21:57:45 -06:00
Jeremy Soller
8d61c79b23
Use RMM TableKind and fix x86_64 compilation
2021-05-03 21:15:46 -06:00
Jeremy Soller
2aa4d8caf5
Merge remote-tracking branch 'origin/aarch64-rebase' into riscv64
2021-05-03 20:52:59 -06:00
Jeremy Soller
17c261553b
Fixes for building x86_64
2021-05-03 20:43:18 -06:00
Jeremy Soller
dfdb562e6b
Use RMM PhysicalAddress
2021-05-03 20:33:31 -06:00
Jeremy Soller
9f0532b1d5
Remove unused flags from old EntryFlags
2021-05-03 17:29:55 -06:00
Jeremy Soller
b9448274fc
Switch to using RMM PageFlags
2021-05-03 17:28:08 -06:00
Jeremy Soller
dd0616cc8f
Use RMM for TLB flushing
2021-05-03 12:42:16 -06:00
Jeremy Soller
29460e0bff
Use RMM for some arch-specific paging functions
2021-05-03 12:14:49 -06:00
Jeremy Soller
ad39568fe9
Fix unwrapping stack when there are kernel addresses (and there always are)
2021-05-02 19:53:31 -06:00
Jeremy Soller
73c77d756d
Print context name in exception
2021-04-28 21:15:21 -06:00
Jeremy Soller
37e6951501
Print CPU and PID when exception occurs
2021-04-28 20:59:52 -06:00
Jeremy Soller
a9bee0bbdc
Require UTF-8 for context name
2021-04-28 20:03:12 -06:00
Jeremy Soller
b26c3e0ae9
Make context name a RwLock
2021-04-28 20:03:05 -06:00
Jeremy Soller
f90033e0e1
Use PHYS_OFFSET instead of KERNEL_OFFSET to refer to the physmap
2021-04-13 20:38:54 -06:00
Jeremy Soller
959a917ba2
Update RMM
2021-04-13 19:34:27 -06:00
4lDO2
bdc925d275
Use GS for TLS!
...
Previously, the kernel used the regular FS segment for Thread-Local
Storage. The problem however, is that userspace code also uses FS for
TLS, meaning that the kernel would have to switch the FS segment between
user and kernel, _upon every syscall_. This is obviously suboptimal for
performance (especially with fast syscalls such as futex, nanosleep, or
yield).
I had to search LLVM for hours, just to find out that the insertion of
the memory load with FS was actually done in the linker, so I added a
flag for that.
I haven't done any proper benchmarking, but the boot process seems to
have gotten much faster!
2021-02-17 14:44:45 +01:00
4lDO2
1988583e23
Forbid lower-half noncanonical addresses too.
2021-02-17 13:00:07 +01:00
4lDO2
a4b3af34a5
Use correct jump instruction.
2021-02-15 20:05:00 +01:00
4lDO2
c19581282d
Use the correct add instruction when popping CS.
2021-02-15 20:02:35 +01:00
4lDO2
8eb58891aa
Simplify sysretq code.
2021-02-15 19:53:49 +01:00
4lDO2
5b2df9f504
Document why usermode() can omit rcx check.
2021-02-15 19:53:49 +01:00
4lDO2
ff33090fd0
Check whether RCX is canonical in sysretq.
2021-02-15 19:53:41 +01:00
4lDO2
a183953ee8
Motivate usage of the IST without SWAPGS involved.
2021-02-15 19:53:37 +01:00
4lDO2
a3583a10ce
Only swapgs when leaving/entering userspace code.
2021-02-15 19:53:37 +01:00
4lDO2
05db0f5977
Temporarily fix sysretq by swapping gs 4 times.
...
In order words, it swaps gs both directly at the start of the syscall
handler, then swaps it back, and the at the end of the syscall handler.
I cannot tell for sure why this is necessary, but probably since some
interrupt handler will execute swapgs in the wrong order or something.
2021-02-15 19:53:37 +01:00
4lDO2
1a8016b985
Give NMI, #DF, and #MC handlers a special stack.
...
This is done by allocating an extra 64 KiB per CPU, and putting it in
the Interrupt Stack Table.
2021-02-15 19:53:37 +01:00
4lDO2
5a638691e0
Treat GS as always pointing to TSS in kernel space.
2021-02-15 19:53:37 +01:00
4lDO2
c913c3be80
Use sysretq in usermode().
2021-02-15 19:53:24 +01:00
4lDO2
a8dc3fcaf1
Begin using sysretq in the system call handler.
2021-02-15 19:53:01 +01:00
Jeremy Soller
238702f7d1
Require UTF-8 for context name
2021-02-13 12:16:47 -07:00
Jeremy Soller
b9f4a915ea
Make context name a RwLock
2021-02-13 11:10:21 -07:00
Robin Randhawa
00723c4ac2
aarch64: Make IRQs use the exception macros
2021-01-26 19:37:23 +00:00
Robin Randhawa
28dfc0f46b
aarch64: Basic exception handlers
2021-01-26 18:18:19 +00:00
Robin Randhawa
4a215c7c2c
aarch64: exception management and clone fixups
2021-01-26 18:17:09 +00:00
Robin Randhawa
3da345867a
aarch64: paging: Derive Debug, PartialEq for VirtualAddressType
...
This makes asserts on VirtualAddressType equality possible.
2021-01-21 11:38:46 +00:00
Robin Randhawa
452196b81f
aarch64: consts: Use the same USER_TLS_SIZE as x86_64
2021-01-21 11:37:32 +00:00
Robin Randhawa
c188a60871
aarch64: Fix clone_ret
...
FIXME: Explain the magic numbers here later.
2021-01-18 21:47:28 +00:00
Robin Randhawa
67d72532a9
aarch64: usermode: Remove tpidr_el0 manipulation
...
Was using the incorrect USER_TLS_OFFSET instead of USER_TCB_OFFSET. In
any case, this is better done in process::clone.
2021-01-17 10:06:04 +00:00