Commit Graph

11 Commits

Author SHA1 Message Date
Andrey Turkin 7db6667e6b Better parsing of IRQ specifications in DTB
Fixes Raspberry 3B+ DTB parsing (as generated by Qemu)
2024-12-18 21:11:46 +03:00
Andrey Turkin 7f38f51b20 dtb: Apply bus mappings 2024-12-18 21:11:46 +03:00
Jeremy Soller 34a6a441f1 Initial aarch64 ACPI support 2024-10-30 16:16:24 -06:00
Jeremy Soller 939c9567ee Support 16550 uarts for aarch64 debug output 2024-10-29 14:06:00 -06:00
Jeremy Soller 380532aea5 Improve reliability of aarch64 startup code 2024-10-29 08:00:57 -06:00
Andrey Turkin 505425bec9 Expose riscv64/aarch64 legacy irqs (requiring remapping) to the irq scheme 2024-10-22 20:26:40 +03:00
Andrey Turkin cba02a26fa Rework irqchip to support risc-v irqs, and add risc-v irq chips handling 2024-10-22 19:16:21 +03:00
Andrey Turkin 906259c024 Pull irqchip from aarch64 code into more generic place 2024-10-21 19:56:32 +03:00
Andrey Turkin 1921c6814b Initial RISC-V implementation
Has no IRQ handling yet
2024-10-20 16:24:21 +03:00
Andrey Turkin 0a6a90415a Refactor initial memory paging 2024-10-19 08:44:46 +03:00
Ivan Tan eb0d48ac81 aarch64: add dtb scheme 2023-09-18 20:45:23 +00:00