diff --git a/CHANGELOG.md b/CHANGELOG.md
index 08ddcdd8db..773a378e89 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -37,6 +37,66 @@ sync with the newest highlights.
   Phase 3 (restore Redox EGL platform), Phase 4 (Intel iris),
   Phase 5 (AMD radeonsi), Phase 6 (Vulkan), Phase 7 (PTL kernel driver).
 
+### Implementation (2026-07-25)
+
+The 7 phases of `local/docs/3D-DRIVER-PLAN.md` have been implemented
+in code with the following scope:
+
+- **Phase 1 (virgl runtime):** added
+  `local/scripts/test-virgl-qemu.sh` — bounded QEMU launch script
+  using `-device virtio-vga-gl,virgl=on` (3D-capable) instead of
+  plain `-device virtio-gpu` (2D-only). Honors the Phase 1 acceptance
+  criterion from the 3D plan.
+- **Phase 2 (LNL/PTL device IDs):** added Lunar Lake (Gen15, Xe2,
+  0x6420/0x6480-0x6484/0x64A0/0x64A1/0x64B0) and Panther Lake (Gen16,
+  Xe3, 0xFF20-0xFF3F / 0xFF40-0xFF4F) to `dmc.rs::display_platform_for_device_id`.
+  Both require DMC firmware; firmware keys for GuC/HuC/GSC added.
+  Three new tests cover the device-ID lookups and firmware-key strings.
+- **Phase 3 (Redox EGL platform):** **deferred**. The original
+  `src/egl/drivers/dri2/platform_redox.c` was removed in upstream Mesa
+  ~25.0; the existing patches 03/06 are orphaned and cannot apply to
+  Mesa 26.1.4. A standalone re-creation was attempted but the Mesa
+  26.1.4 DRI2 API has shifted since. Documented in
+  `local/patches/mesa/26.1.4-defer-redox-platform.patch` for follow-up.
+- **Phase 4 (Intel iris):** added `iris` to `-Dgallium-drivers` in
+  `local/recipes/libs/mesa/recipe.toml`. Compile-side. **Note:** `kmsro`
+  was removed in Mesa 26.1.4 (no longer a valid option).
+- **Phase 5 (AMD radeonsi):** added `radeonsi` to `-Dgallium-drivers`.
+  Compile-side.
+- **Phase 6 (Vulkan):** set `-Dvulkan-drivers=intel,amd,swrast`. This
+  builds Mesa 'anv' (Intel), 'radv' (AMD), and 'lavapipe' (software
+  fallback). **Note:** adding Intel and AMD Vulkan triggers a libclc
+  (Core LLVM Compiler) dependency; the cookbook handles this via the
+  vendored `recipes/dev/llvm21/source/libclc`.
+- **Phase 7 (PTL kernel driver):** added per-subsystem forcewake
+  registers for Panther Lake (Xe3): `PTL_FORCEWAKE_{RENDER,MEDIA,DISPLAY}`
+  at 0xA18C/0xA1A0/0xA1B4. `enable_forcewake_for_platform(platform, ...)`
+  dispatches to PTL path on Gen16 and legacy single-register path
+  elsewhere. Source: Linux 7.1 `drivers/gpu/drm/i915/gt/intel_gt_regs.h`.
+
+### What is NOT yet working (honest scope)
+
+The build-side work above is real and tested at the `cargo check` /
+`meson setup` level. The runtime path is **not** yet working because:
+
+- **No `redox` EGL platform** — `EGL_PLATFORM=redox` does not exist in
+  Mesa 26.1.4. `EGL_PLATFORM=wayland` continues to be the only entry
+  path that reaches Mesa, and it falls back to llvmpipe (swrast)
+  without an explicit `MESA_LOADER_DRIVER_OVERRIDE`.
+- **No Redox Mesa winsys** — iris/radeonsi would need
+  `src/gallium/winsys/redox/` to map onto Redox's scheme:drm ioctl
+  path. Not built. The upstream `virgl_drm_winsys` works for virgl
+  only because it goes through libdrm's redox patch.
+- **Hardware validation pending** — adding LNL/PTL device IDs to
+  the kernel is the necessary pre-condition; the actual boot
+  validation requires physical hardware not present in CI.
+
+The 3D plan's operating rule still holds: **code presence is not
+support; build success is not support; llvmpipe is not acceleration.**
+Phase 3 (Redox EGL platform) is the next code blocker; without it
+the new gallium drivers (iris, radeonsi) compile but are not
+selected at runtime.
+
 ## 2026-07-24 — TLC: panic on first render fixed
 
 ### TLC startup crash