From f5f877ca22358192e944f025f33a98c677a71b89 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Sat, 12 Apr 2025 17:11:04 +0200
Subject: [PATCH] Fix saving and restoring of float registers on arm64

---
 src/context/arch/aarch64.rs | 78 +++++++++++++++++++------------------
 1 file changed, 40 insertions(+), 38 deletions(-)

diff --git a/src/context/arch/aarch64.rs b/src/context/arch/aarch64.rs
index 2d71fce0ba..575503a1df 100644
--- a/src/context/arch/aarch64.rs
+++ b/src/context/arch/aarch64.rs
@@ -206,60 +206,62 @@ pub unsafe fn empty_cr3() -> rmm::PhysicalAddress {
 #[target_feature(enable = "neon")]
 unsafe extern "C" fn fp_save(float_regs: &mut FloatRegisters) {
     core::arch::asm!(
-    "stp q0, q1, [x0, {0} + 16 * 0]",
-    "stp q2, q3, [x0, {0} + 16 * 2]",
-    "stp q4, q5, [x0, {0} + 16 * 4]",
-    "stp q6, q7, [x0, {0} + 16 * 6]",
-    "stp q8, q9, [x0, {0} + 16 * 8]",
-    "stp q10, q11, [x0, {0} + 16 * 10]",
-    "stp q12, q13, [x0, {0} + 16 * 12]",
-    "stp q14, q15, [x0, {0} + 16 * 14]",
-    "stp q16, q17, [x0, {0} + 16 * 16]",
-    "stp q18, q19, [x0, {0} + 16 * 18]",
-    "stp q20, q21, [x0, {0} + 16 * 20]",
-    "stp q22, q23, [x0, {0} + 16 * 22]",
-    "stp q24, q25, [x0, {0} + 16 * 24]",
-    "stp q26, q27, [x0, {0} + 16 * 26]",
-    "stp q28, q29, [x0, {0} + 16 * 28]",
-    "stp q30, q31, [x0, {0} + 16 * 30]",
+    "stp q0, q1, [{3}, {0} + 16 * 0]",
+    "stp q2, q3, [{3}, {0} + 16 * 2]",
+    "stp q4, q5, [{3}, {0} + 16 * 4]",
+    "stp q6, q7, [{3}, {0} + 16 * 6]",
+    "stp q8, q9, [{3}, {0} + 16 * 8]",
+    "stp q10, q11, [{3}, {0} + 16 * 10]",
+    "stp q12, q13, [{3}, {0} + 16 * 12]",
+    "stp q14, q15, [{3}, {0} + 16 * 14]",
+    "stp q16, q17, [{3}, {0} + 16 * 16]",
+    "stp q18, q19, [{3}, {0} + 16 * 18]",
+    "stp q20, q21, [{3}, {0} + 16 * 20]",
+    "stp q22, q23, [{3}, {0} + 16 * 22]",
+    "stp q24, q25, [{3}, {0} + 16 * 24]",
+    "stp q26, q27, [{3}, {0} + 16 * 26]",
+    "stp q28, q29, [{3}, {0} + 16 * 28]",
+    "stp q30, q31, [{3}, {0} + 16 * 30]",
     "mrs x9, fpcr",
-    "add x0, x0, {1}",
-    "str x9, [x0]",
+    "add {3}, {3}, {1}",
+    "str x9, [{3}]",
     "mrs x9, fpsr",
-    "str x9, [x0, {2} - {1}]",
+    "str x9, [{3}, {2} - {1}]",
     const mem::offset_of!(FloatRegisters, fp_simd_regs),
     const mem::offset_of!(FloatRegisters, fpcr),
     const mem::offset_of!(FloatRegisters, fpsr),
+    inout(reg) float_regs => _,
     );
 }
 
 #[target_feature(enable = "neon")]
 unsafe extern "C" fn fp_load(float_regs: &mut FloatRegisters) {
     core::arch::asm!(
-    "ldp q0, q1, [x0, {0} + 16 * 0]",
-    "ldp q2, q3, [x0, {0} + 16 * 2]",
-    "ldp q4, q5, [x0, {0} + 16 * 4]",
-    "ldp q6, q7, [x0, {0} + 16 * 6]",
-    "ldp q8, q9, [x0, {0} + 16 * 8]",
-    "ldp q10, q11, [x0, {0} + 16 * 10]",
-    "ldp q12, q13, [x0, {0} + 16 * 12]",
-    "ldp q14, q15, [x0, {0} + 16 * 14]",
-    "ldp q16, q17, [x0, {0} + 16 * 16]",
-    "ldp q18, q19, [x0, {0} + 16 * 18]",
-    "ldp q20, q21, [x0, {0} + 16 * 20]",
-    "ldp q22, q23, [x0, {0} + 16 * 22]",
-    "ldp q24, q25, [x0, {0} + 16 * 24]",
-    "ldp q26, q27, [x0, {0} + 16 * 26]",
-    "ldp q28, q29, [x0, {0} + 16 * 28]",
-    "ldp q30, q31, [x0, {0} + 16 * 30]",
-    "add x0, x0, {1}",
-    "ldr x9, [x0]",
+    "ldp q0, q1, [{3}, {0} + 16 * 0]",
+    "ldp q2, q3, [{3}, {0} + 16 * 2]",
+    "ldp q4, q5, [{3}, {0} + 16 * 4]",
+    "ldp q6, q7, [{3}, {0} + 16 * 6]",
+    "ldp q8, q9, [{3}, {0} + 16 * 8]",
+    "ldp q10, q11, [{3}, {0} + 16 * 10]",
+    "ldp q12, q13, [{3}, {0} + 16 * 12]",
+    "ldp q14, q15, [{3}, {0} + 16 * 14]",
+    "ldp q16, q17, [{3}, {0} + 16 * 16]",
+    "ldp q18, q19, [{3}, {0} + 16 * 18]",
+    "ldp q20, q21, [{3}, {0} + 16 * 20]",
+    "ldp q22, q23, [{3}, {0} + 16 * 22]",
+    "ldp q24, q25, [{3}, {0} + 16 * 24]",
+    "ldp q26, q27, [{3}, {0} + 16 * 26]",
+    "ldp q28, q29, [{3}, {0} + 16 * 28]",
+    "ldp q30, q31, [{3}, {0} + 16 * 30]",
+    "add {3}, {3}, {1}",
+    "ldr x9, [{3}]",
     "msr fpcr, x9",
-    "ldr x9, [x0, {2} - {1}]",
+    "ldr x9, [{3}, {2} - {1}]",
     "msr fpsr, x9",
     const mem::offset_of!(FloatRegisters, fp_simd_regs),
     const mem::offset_of!(FloatRegisters, fpcr),
     const mem::offset_of!(FloatRegisters, fpsr),
+    inout(reg) float_regs => _,
     );
 }