From f0ff668f0c3e6f87c41ddcb4fca6f9ea15c5049d Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Thu, 16 Feb 2023 07:39:35 -0700 Subject: [PATCH] xhcid: fix direction of status stage in scheme --- xhcid/src/xhci/scheme.rs | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xhcid/src/xhci/scheme.rs b/xhcid/src/xhci/scheme.rs index 4ac7039375..6352b0b694 100644 --- a/xhcid/src/xhci/scheme.rs +++ b/xhcid/src/xhci/scheme.rs @@ -327,11 +327,13 @@ impl Xhci { let (cmd, cycle) = (&mut ring.trbs[last_index], ring.cycle); let interrupter = 0; + // When the data stage is in, the status stage must be out + let input = tk != TransferKind::In; let ioc = true; let ch = false; let ent = false; + cmd.status(interrupter, input, ioc, ch, ent, cycle); - cmd.status(interrupter, tk == TransferKind::In, ioc, ch, ent, cycle); (self.next_transfer_event_trb(RingId::default_control_pipe(port_num as u8), ring, &ring.trbs[last_index]), slot) };