diff --git a/local/patches/kernel/P20-x2apic-icr-mode-fix.patch b/local/patches/kernel/P20-x2apic-icr-mode-fix.patch index 692aeff855..61cfb65276 100644 --- a/local/patches/kernel/P20-x2apic-icr-mode-fix.patch +++ b/local/patches/kernel/P20-x2apic-icr-mode-fix.patch @@ -1,7 +1,7 @@ diff --git a/src/acpi/madt/arch/x86.rs b/src/acpi/madt/arch/x86.rs --- a/src/acpi/madt/arch/x86.rs +++ b/src/acpi/madt/arch/x86.rs -@@ -444,28 +444,40 @@ +@@ -446,7 +446,11 @@ // Send INIT IPI (Assert) { let mut icr = 0x4500u64; @@ -13,13 +13,8 @@ diff --git a/src/acpi/madt/arch/x86.rs b/src/acpi/madt/arch/x86.rs + } local_apic.set_icr(icr); } -- -+ - // Intel SDM Vol 3A §8.4.4: wait 10ms after INIT - early_udelay(10_000); -- -+ - // Send START IPI #1 + +@@ -456,7 +460,11 @@ { let ap_segment = (TRAMPOLINE >> 12) & 0xFF; let mut icr = 0x0600u64 | ap_segment as u64; @@ -31,13 +26,8 @@ diff --git a/src/acpi/madt/arch/x86.rs b/src/acpi/madt/arch/x86.rs + } local_apic.set_icr(icr); } -- -+ - // Intel SDM: wait 200µs between SIPIs - early_udelay(200); -- -+ - // Send START IPI #2 (recommended for compatibility) + +@@ -468,7 +476,11 @@ { let ap_segment = (TRAMPOLINE >> 12) & 0xFF; let mut icr = 0x0600u64 | ap_segment as u64; @@ -49,10 +39,11 @@ diff --git a/src/acpi/madt/arch/x86.rs b/src/acpi/madt/arch/x86.rs + } local_apic.set_icr(icr); } + diff --git a/src/arch/x86_shared/device/local_apic.rs b/src/arch/x86_shared/device/local_apic.rs --- a/src/arch/x86_shared/device/local_apic.rs +++ b/src/arch/x86_shared/device/local_apic.rs -@@ -60,7 +60,7 @@ +@@ -61,9 +61,9 @@ if !self.x2 { - debug!("Detected xAPIC at {:#x}", physaddr.data()); @@ -62,3 +53,4 @@ diff --git a/src/arch/x86_shared/device/local_apic.rs b/src/arch/x86_shared/devi - debug!("Detected x2APIC"); + info!("Detected x2APIC"); } +