From e712a352303dd55fbbb1d4795bf25c68e91ed639 Mon Sep 17 00:00:00 2001
From: Paul Davey <plmdvy@gmail.com>
Date: Tue, 11 Apr 2017 01:10:47 +1200
Subject: [PATCH] xhci: fix port detection.

Ports are now correctly represented as 4 consecutive u32 registers.
Port state now reads all 4 bits of the state value.
---
 xhcid/src/xhci.rs | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/xhcid/src/xhci.rs b/xhcid/src/xhci.rs
index afd78e5eaf..63b7b2d9ba 100644
--- a/xhcid/src/xhci.rs
+++ b/xhcid/src/xhci.rs
@@ -72,15 +72,21 @@ bitflags! {
     }
 }
 
-pub struct XhciPort(Mmio<u32>);
+#[repr(packed)]
+pub struct XhciPort {
+    portsc : Mmio<u32>,
+    portpmsc : Mmio<u32>,
+    portli : Mmio<u32>,
+    porthlpmc : Mmio<u32>,
+}
 
 impl XhciPort {
     fn read(&self) -> u32 {
-        self.0.read()
+        self.portsc.read()
     }
 
     fn state(&self) -> u32 {
-        (self.read() & (0b111 << 5)) >> 5
+        (self.read() & (0b1111 << 5)) >> 5
     }
 
     fn speed(&self) -> u32 {