From e071bdcef4ed20e3f2bfecce76572a458a686d44 Mon Sep 17 00:00:00 2001
From: Wildan Mubarok <willnode@wellosoft.net>
Date: Sat, 16 Aug 2025 11:20:48 +0000
Subject: [PATCH] Use ARM virtual timer to fix HVF acceleration

---
 src/arch/aarch64/device/cpu/registers/control_regs.rs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/arch/aarch64/device/cpu/registers/control_regs.rs b/src/arch/aarch64/device/cpu/registers/control_regs.rs
index 461df7bcad..e30c79de28 100644
--- a/src/arch/aarch64/device/cpu/registers/control_regs.rs
+++ b/src/arch/aarch64/device/cpu/registers/control_regs.rs
@@ -86,22 +86,22 @@ pub unsafe fn cntfreq_el0() -> u32 {
 
 pub unsafe fn tmr_ctrl() -> u32 {
     let ret: usize;
-    asm!("mrs {}, cntp_ctl_el0", out(reg) ret);
+    asm!("mrs {}, cntv_ctl_el0", out(reg) ret);
     ret as u32
 }
 
 pub unsafe fn tmr_ctrl_write(val: u32) {
-    asm!("msr cntp_ctl_el0, {}", in(reg) val as usize);
+    asm!("msr cntv_ctl_el0, {}", in(reg) val as usize);
 }
 
 pub unsafe fn tmr_tval() -> u32 {
     let ret: usize;
-    asm!("mrs {0}, cntp_tval_el0", out(reg) ret);
+    asm!("mrs {0}, cntv_tval_el0", out(reg) ret);
     ret as u32
 }
 
 pub unsafe fn tmr_tval_write(val: u32) {
-    asm!("msr cntp_tval_el0, {}", in(reg) val as usize);
+    asm!("msr cntv_tval_el0, {}", in(reg) val as usize);
 }
 
 pub unsafe fn midr() -> u32 {