restore lost packages from 0.2.3 + fix overwritten 0.2.4 files
- Restore 29 recipe symlinks (libdrm, qtbase, dbus, sddm, pipewire, etc.) - Restore 33 patches (KDE, libdrm, mesa, pipewire, sddm, wireplumber) - Restore 20+ local/scripts (audit, lint, test, build helpers) - Restore src/cook/scheduler.rs, status.rs, gnu-config/ - Restore scripts/patch-inclusion-gate.sh, run_mini1.sh, validate-collision-log.sh - Recover TLC source from HEAD (was overwritten by 0.2.3 checkout) - Recover 11 local/docs plans from HEAD (were overwritten) - Recover qt6-wayland-smoke symlink from HEAD - Fix MOTD: remove garbled ASCII art, use clean text - Update version: 0.2.0 -> 0.2.4 in os-release, motd, config - Reduce filesystem_size: 1536 -> 512 MiB - Add ABSOLUTE RULE to AGENTS.md: never delete/ignore packages - Reduce pcid scheme log verbosity: info -> debug
This commit is contained in:
@@ -0,0 +1,54 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Driver for Qualcomm Secure Execution Environment (SEE) interface (QSEECOM).
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* Responsible for setting up and managing QSEECOM client devices.
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*
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* Copyright (C) 2023 Maximilian Luz <luzmaximilian@gmail.com>
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*/
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#ifndef __QCOM_QSEECOM_H
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#define __QCOM_QSEECOM_H
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#include <linux/auxiliary_bus.h>
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#include <linux/dma-mapping.h>
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#include <linux/types.h>
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#include <linux/firmware/qcom/qcom_scm.h>
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/**
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* struct qseecom_client - QSEECOM client device.
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* @aux_dev: Underlying auxiliary device.
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* @app_id: ID of the loaded application.
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*/
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struct qseecom_client {
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struct auxiliary_device aux_dev;
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u32 app_id;
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};
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/**
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* qcom_qseecom_app_send() - Send to and receive data from a given QSEE app.
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* @client: The QSEECOM client associated with the target app.
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* @req: Request buffer sent to the app (must be TZ memory).
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* @req_size: Size of the request buffer.
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* @rsp: Response buffer, written to by the app (must be TZ memory).
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* @rsp_size: Size of the response buffer.
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*
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* Sends a request to the QSEE app associated with the given client and read
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* back its response. The caller must provide two DMA memory regions, one for
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* the request and one for the response, and fill out the @req region with the
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* respective (app-specific) request data. The QSEE app reads this and returns
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* its response in the @rsp region.
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*
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* Note: This is a convenience wrapper around qcom_scm_qseecom_app_send().
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* Clients should prefer to use this wrapper.
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*
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* Return: Zero on success, nonzero on failure.
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*/
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static inline int qcom_qseecom_app_send(struct qseecom_client *client,
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void *req, size_t req_size,
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void *rsp, size_t rsp_size)
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{
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return qcom_scm_qseecom_app_send(client->app_id, req, req_size, rsp, rsp_size);
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}
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#endif /* __QCOM_QSEECOM_H */
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@@ -0,0 +1,198 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights reserved.
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* Copyright (C) 2015 Linaro Ltd.
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*/
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#ifndef __QCOM_SCM_H
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#define __QCOM_SCM_H
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#include <linux/err.h>
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#include <linux/types.h>
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#include <linux/cpumask.h>
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#include <dt-bindings/firmware/qcom,scm.h>
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#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
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#define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
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#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
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#define QCOM_SCM_HDCP_MAX_REQ_CNT 5
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struct qcom_scm_hdcp_req {
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u32 addr;
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u32 val;
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};
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struct qcom_scm_vmperm {
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int vmid;
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int perm;
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};
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enum qcom_scm_ocmem_client {
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QCOM_SCM_OCMEM_UNUSED_ID = 0x0,
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QCOM_SCM_OCMEM_GRAPHICS_ID,
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QCOM_SCM_OCMEM_VIDEO_ID,
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QCOM_SCM_OCMEM_LP_AUDIO_ID,
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QCOM_SCM_OCMEM_SENSORS_ID,
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QCOM_SCM_OCMEM_OTHER_OS_ID,
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QCOM_SCM_OCMEM_DEBUG_ID,
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};
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enum qcom_scm_sec_dev_id {
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QCOM_SCM_MDSS_DEV_ID = 1,
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QCOM_SCM_OCMEM_DEV_ID = 5,
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QCOM_SCM_PCIE0_DEV_ID = 11,
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QCOM_SCM_PCIE1_DEV_ID = 12,
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QCOM_SCM_GFX_DEV_ID = 18,
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QCOM_SCM_UFS_DEV_ID = 19,
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QCOM_SCM_ICE_DEV_ID = 20,
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};
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enum qcom_scm_ice_cipher {
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QCOM_SCM_ICE_CIPHER_AES_128_XTS = 0,
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QCOM_SCM_ICE_CIPHER_AES_128_CBC = 1,
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QCOM_SCM_ICE_CIPHER_AES_256_XTS = 3,
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QCOM_SCM_ICE_CIPHER_AES_256_CBC = 4,
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};
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#define QCOM_SCM_PERM_READ 0x4
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#define QCOM_SCM_PERM_WRITE 0x2
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#define QCOM_SCM_PERM_EXEC 0x1
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#define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
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#define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
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bool qcom_scm_is_available(void);
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int qcom_scm_set_cold_boot_addr(void *entry);
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int qcom_scm_set_warm_boot_addr(void *entry);
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void qcom_scm_cpu_power_down(u32 flags);
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int qcom_scm_set_remote_state(u32 state, u32 id);
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struct qcom_scm_pas_context {
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struct device *dev;
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u32 pas_id;
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phys_addr_t mem_phys;
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size_t mem_size;
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void *ptr;
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dma_addr_t phys;
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ssize_t size;
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bool use_tzmem;
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};
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struct qcom_scm_pas_context *devm_qcom_scm_pas_context_alloc(struct device *dev,
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u32 pas_id,
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phys_addr_t mem_phys,
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size_t mem_size);
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int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size,
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struct qcom_scm_pas_context *ctx);
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void qcom_scm_pas_metadata_release(struct qcom_scm_pas_context *ctx);
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int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size);
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int qcom_scm_pas_auth_and_reset(u32 pas_id);
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int qcom_scm_pas_shutdown(u32 pas_id);
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bool qcom_scm_pas_supported(u32 pas_id);
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struct resource_table *qcom_scm_pas_get_rsc_table(struct qcom_scm_pas_context *ctx,
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void *input_rt, size_t input_rt_size,
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size_t *output_rt_size);
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int qcom_scm_pas_prepare_and_auth_reset(struct qcom_scm_pas_context *ctx);
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int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
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int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
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bool qcom_scm_restore_sec_cfg_available(void);
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int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
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int qcom_scm_set_gpu_smmu_aperture(unsigned int context_bank);
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bool qcom_scm_set_gpu_smmu_aperture_is_available(void);
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int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
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int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
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int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size);
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int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
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u32 cp_nonpixel_start, u32 cp_nonpixel_size);
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int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, u64 *src,
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const struct qcom_scm_vmperm *newvm,
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unsigned int dest_cnt);
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bool qcom_scm_ocmem_lock_available(void);
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int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, u32 size,
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u32 mode);
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int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size);
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bool qcom_scm_ice_available(void);
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int qcom_scm_ice_invalidate_key(u32 index);
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int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
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enum qcom_scm_ice_cipher cipher, u32 data_unit_size);
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bool qcom_scm_has_wrapped_key_support(void);
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int qcom_scm_derive_sw_secret(const u8 *eph_key, size_t eph_key_size,
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u8 *sw_secret, size_t sw_secret_size);
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int qcom_scm_generate_ice_key(u8 *lt_key, size_t lt_key_size);
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int qcom_scm_prepare_ice_key(const u8 *lt_key, size_t lt_key_size,
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u8 *eph_key, size_t eph_key_size);
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int qcom_scm_import_ice_key(const u8 *raw_key, size_t raw_key_size,
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u8 *lt_key, size_t lt_key_size);
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bool qcom_scm_hdcp_available(void);
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int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp);
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int qcom_scm_iommu_set_pt_format(u32 sec_id, u32 ctx_num, u32 pt_fmt);
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int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
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int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
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u64 limit_node, u32 node_id, u64 version);
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int qcom_scm_lmh_profile_change(u32 profile_id);
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bool qcom_scm_lmh_dcvsh_available(void);
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/*
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* Request TZ to program set of access controlled registers necessary
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* irrespective of any features
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*/
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#define QCOM_SCM_GPU_ALWAYS_EN_REQ BIT(0)
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/*
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* Request TZ to program BCL id to access controlled register when BCL is
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* enabled
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*/
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#define QCOM_SCM_GPU_BCL_EN_REQ BIT(1)
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/*
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* Request TZ to program set of access controlled register for CLX feature
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* when enabled
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*/
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#define QCOM_SCM_GPU_CLX_EN_REQ BIT(2)
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/*
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* Request TZ to program tsense ids to access controlled registers for reading
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* gpu temperature sensors
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*/
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#define QCOM_SCM_GPU_TSENSE_EN_REQ BIT(3)
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int qcom_scm_gpu_init_regs(u32 gpu_req);
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int qcom_scm_shm_bridge_create(u64 pfn_and_ns_perm_flags,
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u64 ipfn_and_s_perm_flags, u64 size_and_flags,
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u64 ns_vmids, u64 *handle);
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int qcom_scm_shm_bridge_delete(u64 handle);
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#ifdef CONFIG_QCOM_QSEECOM
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int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id);
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int qcom_scm_qseecom_app_send(u32 app_id, void *req, size_t req_size,
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void *rsp, size_t rsp_size);
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#else /* CONFIG_QCOM_QSEECOM */
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static inline int qcom_scm_qseecom_app_get_id(const char *app_name, u32 *app_id)
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{
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return -EINVAL;
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}
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static inline int qcom_scm_qseecom_app_send(u32 app_id,
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void *req, size_t req_size,
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void *rsp, size_t rsp_size)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_QCOM_QSEECOM */
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int qcom_scm_qtee_invoke_smc(phys_addr_t inbuf, size_t inbuf_size,
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phys_addr_t outbuf, size_t outbuf_size,
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u64 *result, u64 *response_type);
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int qcom_scm_qtee_callback_response(phys_addr_t buf, size_t buf_size,
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u64 *result, u64 *response_type);
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#endif
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@@ -0,0 +1,80 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2023-2024 Linaro Ltd.
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*/
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#ifndef __QCOM_TZMEM_H
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#define __QCOM_TZMEM_H
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#include <linux/cleanup.h>
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#include <linux/gfp.h>
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#include <linux/types.h>
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struct device;
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struct qcom_tzmem_pool;
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/**
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* enum qcom_tzmem_policy - Policy for pool growth.
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*/
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enum qcom_tzmem_policy {
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/**
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* @QCOM_TZMEM_POLICY_STATIC: Static pool,
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* never grow above initial size.
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*/
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QCOM_TZMEM_POLICY_STATIC = 1,
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/**
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* @QCOM_TZMEM_POLICY_MULTIPLIER: When out of memory,
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* add increment * current size of memory.
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*/
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QCOM_TZMEM_POLICY_MULTIPLIER,
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/**
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* @QCOM_TZMEM_POLICY_ON_DEMAND: When out of memory
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* add as much as is needed until max_size.
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*/
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QCOM_TZMEM_POLICY_ON_DEMAND,
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};
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/**
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* struct qcom_tzmem_pool_config - TZ memory pool configuration.
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* @initial_size: Number of bytes to allocate for the pool during its creation.
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* @policy: Pool size growth policy.
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* @increment: Used with policies that allow pool growth.
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* @max_size: Size above which the pool will never grow.
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*/
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struct qcom_tzmem_pool_config {
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size_t initial_size;
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enum qcom_tzmem_policy policy;
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size_t increment;
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size_t max_size;
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};
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struct qcom_tzmem_pool *
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qcom_tzmem_pool_new(const struct qcom_tzmem_pool_config *config);
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void qcom_tzmem_pool_free(struct qcom_tzmem_pool *pool);
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struct qcom_tzmem_pool *
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devm_qcom_tzmem_pool_new(struct device *dev,
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const struct qcom_tzmem_pool_config *config);
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void *qcom_tzmem_alloc(struct qcom_tzmem_pool *pool, size_t size, gfp_t gfp);
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void qcom_tzmem_free(void *ptr);
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DEFINE_FREE(qcom_tzmem, void *, if (_T) qcom_tzmem_free(_T))
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phys_addr_t qcom_tzmem_to_phys(void *ptr);
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#if IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE)
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int qcom_tzmem_shm_bridge_create(phys_addr_t paddr, size_t size, u64 *handle);
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void qcom_tzmem_shm_bridge_delete(u64 handle);
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#else
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static inline int qcom_tzmem_shm_bridge_create(phys_addr_t paddr,
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size_t size, u64 *handle)
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{
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return 0;
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}
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static inline void qcom_tzmem_shm_bridge_delete(u64 handle)
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{
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}
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#endif
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#endif /* __QCOM_TZMEM */
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