From d3dc2e0f80d5333b2fb328142e9bf34864b62d98 Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Tue, 11 Jun 2024 20:56:45 +0200 Subject: [PATCH] pcid: Remove all PciFunc methods --- pcid/src/driver_handler.rs | 6 ++--- pcid/src/pci/cap.rs | 28 +++++++++++++++------ pcid/src/pci/func.rs | 27 -------------------- pcid/src/pci/msi.rs | 50 +++++++++++++++++++------------------- 4 files changed, 48 insertions(+), 63 deletions(-) diff --git a/pcid/src/driver_handler.rs b/pcid/src/driver_handler.rs index 77f1729829..8bb18f4db3 100644 --- a/pcid/src/driver_handler.rs +++ b/pcid/src/driver_handler.rs @@ -5,7 +5,7 @@ use std::sync::Arc; use std::thread; use log::{error, info}; -use pci_types::PciAddress; +use pci_types::{ConfigRegionAccess, PciAddress}; use crate::driver_interface; use crate::pci::cap::Capability as PciCapability; @@ -303,12 +303,12 @@ impl DriverHandler { } }, PcidClientRequest::ReadConfig(offset) => { - let value = unsafe { func.read_u32(offset) }; + let value = unsafe { self.state.pcie.read(self.addr, offset) }; return PcidClientResponse::ReadConfig(value); } PcidClientRequest::WriteConfig(offset, value) => { unsafe { - func.write_u32(offset, value); + self.state.pcie.write(self.addr, offset, value); } return PcidClientResponse::WriteConfig; } diff --git a/pcid/src/pci/cap.rs b/pcid/src/pci/cap.rs index 06e1436f5f..39cc0ff329 100644 --- a/pcid/src/pci/cap.rs +++ b/pcid/src/pci/cap.rs @@ -24,7 +24,7 @@ impl<'a> Iterator for CapabilitiesIter<'a> { if self.offset == 0 { return None }; - let first_dword = self.func.read_u32(u16::from(self.offset)); + let first_dword = self.func.pci.read(self.func.addr, u16::from(self.offset)); let next = ((first_dword >> 8) & 0xFF) as u8; let offset = self.offset; @@ -139,17 +139,29 @@ impl Capability { unsafe fn parse_msix(func: &PciFunc, offset: u8) -> Self { Self::MsiX(MsixCapability { cap_offset: offset, - a: func.read_u32(u16::from(offset)), - b: func.read_u32(u16::from(offset + 4)), - c: func.read_u32(u16::from(offset + 8)), + a: func.pci.read(func.addr, u16::from(offset)), + b: func.pci.read(func.addr, u16::from(offset + 4)), + c: func.pci.read(func.addr, u16::from(offset + 8)), }) } unsafe fn parse_vendor(func: &PciFunc, offset: u8) -> Self { - let next = func.read_u8(u16::from(offset+1)); - let length = func.read_u8(u16::from(offset+2)); + let dword = func.pci.read(func.addr, u16::from(offset)); + let next = (dword >> 8) & 0xFF; + let length = ((dword >> 16) & 0xFF) as u16; log::info!("Vendor specific offset: {offset:#02x} next: {next:#02x} cap len: {length:#02x}"); let data = if length > 0 { - let mut raw_data = func.read_range(offset.into(), length.into()); + assert!( + length > 3 && length % 4 == 0, + "invalid range length: {}", + length + ); + let offset = u16::from(offset); + let mut raw_data = { + (offset..offset + length) + .step_by(4) + .flat_map(|offset| func.pci.read(func.addr, offset).to_le_bytes()) + .collect::>() + }; raw_data.drain(3..).collect() } else { log::warn!("Vendor specific capability is invalid"); @@ -162,7 +174,7 @@ impl Capability { unsafe fn parse(func: &PciFunc, offset: u8) -> Self { assert_eq!(offset & 0xFC, offset, "capability must be dword aligned"); - let dword = func.read_u32(u16::from(offset)); + let dword = func.pci.read(func.addr, u16::from(offset)); let capability_id = (dword & 0xFF) as u8; if capability_id == CapabilityId::Msi as u8 { diff --git a/pcid/src/pci/func.rs b/pcid/src/pci/func.rs index 7caec137a8..259a74542b 100644 --- a/pcid/src/pci/func.rs +++ b/pcid/src/pci/func.rs @@ -4,30 +4,3 @@ pub struct PciFunc<'pci> { pub pci: &'pci dyn ConfigRegionAccess, pub addr: PciAddress, } - -impl<'pci> PciFunc<'pci> { - pub unsafe fn read_range(&self, offset: u16, len: u16) -> Vec { - assert!(len > 3 && len % 4 == 0, "invalid range length: {}", len); - (offset..offset + len) - .step_by(4) - .flat_map(|offset| self.read_u32(offset).to_le_bytes()) - .collect::>() - } - - pub unsafe fn read_u8(&self, offset: u16) -> u8 { - let dword_offset = (offset / 4) * 4; - let dword = self.read_u32(dword_offset); - - let shift = (offset % 4) * 8; - ((dword >> shift) & 0xFF) as u8 - } - - pub unsafe fn read_u32(&self, offset: u16) -> u32 { - self.pci.read(self.addr, offset) - } -} -impl<'pci> PciFunc<'pci> { - pub unsafe fn write_u32(&self, offset: u16, value: u32) { - self.pci.write(self.addr, offset, value); - } -} diff --git a/pcid/src/pci/msi.rs b/pcid/src/pci/msi.rs index 2af0c43d99..4c43ff0920 100644 --- a/pcid/src/pci/msi.rs +++ b/pcid/src/pci/msi.rs @@ -43,7 +43,7 @@ impl MsiCapability { const MC_MSI_ENABLED_BIT: u16 = 1; pub(crate) unsafe fn parse(func: &PciFunc, offset: u8) -> Self { - let dword = func.read_u32(u16::from(offset)); + let dword = func.pci.read(func.addr, u16::from(offset)); let message_control = (dword >> 16) as u16; @@ -52,20 +52,20 @@ impl MsiCapability { Self::_64BitAddressWithPvm { cap_offset: offset, message_control: dword, - message_address_lo: func.read_u32(u16::from(offset + 4)), - message_address_hi: func.read_u32(u16::from(offset + 8)), - message_data: func.read_u32(u16::from(offset + 12)), - mask_bits: func.read_u32(u16::from(offset + 16)), - pending_bits: func.read_u32(u16::from(offset + 20)), + message_address_lo: func.pci.read(func.addr, u16::from(offset + 4)), + message_address_hi: func.pci.read(func.addr, u16::from(offset + 8)), + message_data: func.pci.read(func.addr, u16::from(offset + 12)), + mask_bits: func.pci.read(func.addr, u16::from(offset + 16)), + pending_bits: func.pci.read(func.addr, u16::from(offset + 20)), } } else { Self::_32BitAddressWithPvm { cap_offset: offset, message_control: dword, - message_address: func.read_u32(u16::from(offset + 4)), - message_data: func.read_u32(u16::from(offset + 8)), - mask_bits: func.read_u32(u16::from(offset + 12)), - pending_bits: func.read_u32(u16::from(offset + 16)), + message_address: func.pci.read(func.addr, u16::from(offset + 4)), + message_data: func.pci.read(func.addr, u16::from(offset + 8)), + mask_bits: func.pci.read(func.addr, u16::from(offset + 12)), + pending_bits: func.pci.read(func.addr, u16::from(offset + 16)), } } } else { @@ -73,16 +73,16 @@ impl MsiCapability { Self::_64BitAddress { cap_offset: offset, message_control: dword, - message_address_lo: func.read_u32(u16::from(offset + 4)), - message_address_hi: func.read_u32(u16::from(offset + 8)), - message_data: func.read_u32(u16::from(offset + 12)) as u16, + message_address_lo: func.pci.read(func.addr, u16::from(offset + 4)), + message_address_hi: func.pci.read(func.addr, u16::from(offset + 8)), + message_data: func.pci.read(func.addr, u16::from(offset + 12)) as u16, } } else { Self::_32BitAddress { cap_offset: offset, message_control: dword, - message_address: func.read_u32(u16::from(offset + 4)), - message_data: func.read_u32(u16::from(offset + 8)) as u16, + message_address: func.pci.read(func.addr, u16::from(offset + 4)), + message_data: func.pci.read(func.addr, u16::from(offset + 8)) as u16, } } } @@ -117,7 +117,7 @@ impl MsiCapability { } } pub(crate) unsafe fn write_message_control(&self, func: &PciFunc) { - func.write_u32(self.cap_offset(), self.message_control_raw()); + func.pci.write(func.addr, self.cap_offset(), self.message_control_raw()); } pub(crate) fn is_pvt_capable(&self) -> bool { self.message_control() & Self::MC_PVT_CAPABLE_BIT != 0 @@ -185,25 +185,25 @@ impl MsiCapability { Some(()) } unsafe fn write_message_address(&self, func: &PciFunc) { - func.write_u32(self.cap_offset() + 4, self.message_address()) + func.pci.write(func.addr, self.cap_offset() + 4, self.message_address()) } unsafe fn write_message_upper_address(&self, func: &PciFunc) -> Option<()> { let value = self.message_upper_address()?; - func.write_u32(self.cap_offset() + 8, value); + func.pci.write(func.addr, self.cap_offset() + 8, value); Some(()) } unsafe fn write_message_data(&self, func: &PciFunc) { match self { - &Self::_32BitAddress { cap_offset, message_data, .. } => func.write_u32(u16::from(cap_offset + 8), message_data.into()), - &Self::_32BitAddressWithPvm { cap_offset, message_data, .. } => func.write_u32(u16::from(cap_offset + 8), message_data), - &Self::_64BitAddress { cap_offset, message_data, .. } => func.write_u32(u16::from(cap_offset + 12), message_data.into()), - &Self::_64BitAddressWithPvm { cap_offset, message_data, .. } => func.write_u32(u16::from(cap_offset + 12), message_data), + &Self::_32BitAddress { cap_offset, message_data, .. } => func.pci.write(func.addr, u16::from(cap_offset + 8), message_data.into()), + &Self::_32BitAddressWithPvm { cap_offset, message_data, .. } => func.pci.write(func.addr, u16::from(cap_offset + 8), message_data), + &Self::_64BitAddress { cap_offset, message_data, .. } => func.pci.write(func.addr, u16::from(cap_offset + 12), message_data.into()), + &Self::_64BitAddressWithPvm { cap_offset, message_data, .. } => func.pci.write(func.addr, u16::from(cap_offset + 12), message_data), } } unsafe fn write_mask_bits(&self, func: &PciFunc) -> Option<()> { match self { - &Self::_32BitAddressWithPvm { cap_offset, mask_bits, .. } => func.write_u32(u16::from(cap_offset + 12), mask_bits), - &Self::_64BitAddressWithPvm { cap_offset, mask_bits, .. } => func.write_u32(u16::from(cap_offset + 16), mask_bits), + &Self::_32BitAddressWithPvm { cap_offset, mask_bits, .. } => func.pci.write(func.addr, u16::from(cap_offset + 12), mask_bits), + &Self::_64BitAddressWithPvm { cap_offset, mask_bits, .. } => func.pci.write(func.addr, u16::from(cap_offset + 16), mask_bits), &Self::_32BitAddress { .. } | &Self::_64BitAddress { .. } => return None, } Some(()) @@ -329,7 +329,7 @@ impl MsixCapability { /// Write the first DWORD into configuration space (containing the partially modifiable Message /// Control field). pub(crate) unsafe fn write_a(&self, func: &PciFunc) { - func.write_u32(u16::from(self.cap_offset), self.a) + func.pci.write(func.addr, u16::from(self.cap_offset), self.a) } }