Wholesale fix of warnings
Pretty straightforward changes. This commit tries to avoid making any non-trivial fixes.
This commit is contained in:
@@ -1,19 +1,7 @@
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use alloc::sync::Arc;
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use core::{
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arch::asm,
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mem,
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mem::offset_of,
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ptr,
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sync::atomic::{AtomicBool, Ordering},
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};
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use core::{arch::asm, mem, mem::offset_of, ptr, sync::atomic::AtomicBool};
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use spin::Once;
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use crate::{
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device::cpu::registers::{control_regs, tlb},
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paging::{RmmA, RmmArch, TableKind},
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percpu::PercpuBlock,
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syscall::FloatRegisters,
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};
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use crate::{percpu::PercpuBlock, syscall::FloatRegisters};
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/// This must be used by the kernel to ensure that context switches are done atomically
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/// Compare and exchange this to true when beginning a context switch on any CPU
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@@ -86,19 +74,12 @@ impl Context {
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self.lr = address;
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}
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pub fn set_fp(&mut self, address: usize) {
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self.fp = address;
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}
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pub fn set_context_handle(&mut self) {
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let address = self as *const _ as usize;
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self.tpidrro_el0 = address;
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}
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pub fn get_context_handle(&mut self) -> usize {
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self.tpidrro_el0
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}
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#[allow(unused)]
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pub fn dump(&self) {
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println!("elr_el1: 0x{:016x}", self.elr_el1);
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println!("sp_el0: 0x{:016x}", self.sp_el0);
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@@ -131,7 +112,7 @@ impl super::Context {
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unsafe { ptr::read(self.kfx.as_ptr() as *const FloatRegisters) }
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}
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pub fn set_fx_regs(&mut self, mut new: FloatRegisters) {
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pub fn set_fx_regs(&mut self, new: FloatRegisters) {
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if !self.arch.fx_loadable {
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panic!("TODO: make set_fx_regs always work");
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}
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@@ -162,7 +143,7 @@ pub unsafe fn empty_cr3() -> rmm::PhysicalAddress {
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#[target_feature(enable = "neon")]
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#[naked]
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unsafe fn fp_save(float_regs: &mut FloatRegisters) {
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unsafe extern "C" fn fp_save(float_regs: &mut FloatRegisters) {
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asm!(
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"stp q0, q1, [x0, {0} + 16 * 0]",
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"stp q2, q3, [x0, {0} + 16 * 2]",
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@@ -195,7 +176,7 @@ unsafe fn fp_save(float_regs: &mut FloatRegisters) {
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#[target_feature(enable = "neon")]
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#[naked]
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unsafe fn fp_load(float_regs: &mut FloatRegisters) {
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unsafe extern "C" fn fp_load(float_regs: &mut FloatRegisters) {
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asm!(
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"ldp q0, q1, [x0, {0} + 16 * 0]",
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"ldp q2, q3, [x0, {0} + 16 * 2]",
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@@ -1,10 +1,7 @@
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use core::{mem, sync::atomic::AtomicBool};
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use alloc::sync::Arc;
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use core::sync::atomic::AtomicBool;
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use crate::{
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gdt::{pcr, GDT_USER_FS, GDT_USER_GS},
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paging::{RmmA, RmmArch, TableKind},
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percpu::PercpuBlock,
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syscall::FloatRegisters,
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};
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@@ -6,7 +6,6 @@ use core::{
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num::NonZeroUsize,
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sync::atomic::{AtomicU32, Ordering},
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};
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use hashbrown::HashMap;
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use rmm::{Arch as _, PageFlush};
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use spin::{RwLock, RwLockReadGuard, RwLockUpgradableGuard, RwLockWriteGuard};
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use syscall::{error::*, flag::MapFlags, GrantFlags, MunmapFlags};
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@@ -728,9 +727,6 @@ pub struct UserGrants {
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holes: BTreeMap<VirtualAddress, usize>,
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// TODO: Would an additional map ordered by (size,start) to allow for O(log n) allocations be
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// beneficial?
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//TODO: technically VirtualAddress is from a scheme's context!
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pub funmap: HashMap<Page, (usize, Page)>,
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}
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#[derive(Clone, Copy)]
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@@ -836,7 +832,6 @@ impl UserGrants {
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inner: BTreeMap::new(),
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holes: core::iter::once((VirtualAddress::new(0), crate::USER_END_OFFSET))
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.collect::<BTreeMap<_, _>>(),
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funmap: HashMap::new(),
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}
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}
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/// Returns the grant, if any, which occupies the specified page
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