diff --git a/ahcid/src/ahci/hba.rs b/ahcid/src/ahci/hba.rs
index f294f14b0e..4792cbb8d3 100644
--- a/ahcid/src/ahci/hba.rs
+++ b/ahcid/src/ahci/hba.rs
@@ -24,10 +24,6 @@ const HBA_SIG_ATAPI: u32 = 0xEB140101;
 const HBA_SIG_PM: u32 = 0x96690101;
 const HBA_SIG_SEMB: u32 = 0xC33C0101;
 
-fn pause() {
-    unsafe { asm!("pause" : : : "memory" : "intel", "volatile"); }
-}
-
 #[derive(Debug)]
 pub enum HbaPortType {
     None,
@@ -77,7 +73,7 @@ impl HbaPort {
 
     pub fn start(&mut self) {
         while self.cmd.readf(HBA_PORT_CMD_CR) {
-            pause();
+            thread::yield_now();
         }
 
         self.cmd.writef(HBA_PORT_CMD_FRE | HBA_PORT_CMD_ST, true);
@@ -87,7 +83,7 @@ impl HbaPort {
         self.cmd.writef(HBA_PORT_CMD_ST, false);
 
         while self.cmd.readf(HBA_PORT_CMD_FR | HBA_PORT_CMD_CR) {
-            pause();
+            thread::yield_now();
         }
 
         self.cmd.writef(HBA_PORT_CMD_FRE, false);
@@ -163,7 +159,7 @@ impl HbaPort {
             }
 
             while self.tfd.readf((ATA_DEV_BUSY | ATA_DEV_DRQ) as u32) {
-                pause();
+                thread::yield_now();
             }
 
             self.ci.writef(1 << slot, true);
@@ -171,7 +167,7 @@ impl HbaPort {
             self.start();
 
             while (self.ci.readf(1 << slot) || self.tfd.readf(0x80)) && self.is.read() & HBA_PORT_IS_ERR == 0 {
-                pause();
+                thread::yield_now();
             }
 
             self.stop();
@@ -299,7 +295,7 @@ impl HbaPort {
                 //print!("WAIT ATA_DEV_BUSY | ATA_DEV_DRQ\n");
             }
             while self.tfd.readf((ATA_DEV_BUSY | ATA_DEV_DRQ) as u32) {
-                pause();
+                thread::yield_now();
             }
 
             if write {
@@ -313,7 +309,7 @@ impl HbaPort {
                 //print!("{}", format!("WAIT CI {:X} in {:X}\n", 1 << slot, self.ci.read()));
             }
             while (self.ci.readf(1 << slot) || self.tfd.readf(0x80)) && self.is.read() & HBA_PORT_IS_ERR == 0 {
-                pause();
+                thread::yield_now();
                 if write {
                     //print!("{}", format!("WAIT CI {:X} TFD {:X} IS {:X} CMD {:X} SERR {:X}\n", self.ci.read(), self.tfd.read(), self.is.read(), self.cmd.read(), self.serr.read()));
                 }
diff --git a/e1000d/src/device.rs b/e1000d/src/device.rs
index 350857c558..bfa6d51408 100644
--- a/e1000d/src/device.rs
+++ b/e1000d/src/device.rs
@@ -187,8 +187,6 @@ impl Scheme for Intel8254x {
 
                 return Ok(i);
             }
-
-            unsafe { asm!("pause" : : : "memory" : "intel", "volatile"); }
         }
     }
 
@@ -348,13 +346,6 @@ impl Intel8254x {
         // TIPG Packet Gap
         // TODO ...
 
-        print!("{}", format!("   - CTRL: {:X}\n", self.read(CTRL)));
-        print!("{}", format!("   - STS: {:X}\n", self.read(STATUS)));
-        print!("{}", format!("   - RCTL: {:X}\n", self.read(RCTL)));
-        print!("{}", format!("   - TCTL: {:X}\n", self.read(TCTL)));
-        print!("{}", format!("   - IMS: {:X}\n", self.read(IMS)));
-
-
         print!("   - Waiting for link up\n");
         while self.read(STATUS) & 2 != 2 {
             thread::yield_now();
diff --git a/rtl8168d/src/device.rs b/rtl8168d/src/device.rs
index 9cb3205708..bde150b626 100644
--- a/rtl8168d/src/device.rs
+++ b/rtl8168d/src/device.rs
@@ -140,7 +140,7 @@ impl SchemeMut for Rtl8168 {
                 }
             }
 
-            unsafe { asm!("pause" : : : "memory" : "intel", "volatile"); }
+            thread::yield_now();
         }
     }