From bbb9d985702af5af7059d3d0c8eeede4f10e436f Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Sat, 4 Apr 2026 14:01:19 +0200 Subject: [PATCH] Unconditionally compile part of the DTB code --- Cargo.toml | 4 +--- src/dtb/mod.rs | 26 +++++++++----------------- src/main.rs | 1 - src/scheme/mod.rs | 20 ++++++-------------- src/startup/memory.rs | 1 - src/startup/mod.rs | 1 - 6 files changed, 16 insertions(+), 37 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 9ea80c0883..4af82bb45d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -15,6 +15,7 @@ toml = "0.8" arrayvec = { version = "0.7.4", default-features = false } bitfield = "0.13.2" bitflags = "2" +fdt = { git = "https://github.com/repnop/fdt.git", rev = "2fb1409edd1877c714a0aa36b6a7c5351004be54" } hashbrown = { version = "0.14.3", default-features = false, features = ["ahash", "inline-more"] } linked_list_allocator = "0.9.0" redox-path = "0.2.0" @@ -67,9 +68,6 @@ static_mut_refs = "warn" # FIXME deny once all occurrences are fixed unreachable_patterns = "deny" unused_must_use = "deny" # Ensure that all must_use results are used -[target.'cfg(any(target_arch = "aarch64", target_arch = "riscv64"))'.dependencies] -fdt = { git = "https://github.com/repnop/fdt.git", rev = "2fb1409edd1877c714a0aa36b6a7c5351004be54" } - [target.'cfg(any(target_arch = "x86", target_arch = "x86_64"))'.dependencies] raw-cpuid = "10.2.0" x86 = { version = "0.47.0", default-features = false } diff --git a/src/dtb/mod.rs b/src/dtb/mod.rs index 0449e99e07..0e69379b00 100644 --- a/src/dtb/mod.rs +++ b/src/dtb/mod.rs @@ -1,9 +1,9 @@ +#[cfg(dtb)] pub mod irqchip; -use crate::{ - dtb::irqchip::IrqCell, - startup::memory::{register_memory_region, BootloaderMemoryKind}, -}; +#[cfg(dtb)] +use crate::dtb::irqchip::IrqCell; +use crate::startup::memory::{register_memory_region, BootloaderMemoryKind}; use core::slice; use fdt::{ node::{FdtNode, NodeProperty}, @@ -24,6 +24,7 @@ pub static DTB_BINARY: Once<&'static [u8]> = Once::new(); /// The referenced memory must contain a valid DTB for the underlying system. /// /// The referenced memory must **not** be mutated for the duration of kernel run-time. +#[cfg_attr(not(dtb), expect(dead_code))] pub unsafe fn init(dtb: Option<(usize, usize)>) { let mut initialized = false; DTB_BINARY.call_once(|| { @@ -41,6 +42,7 @@ pub unsafe fn init(dtb: Option<(usize, usize)>) { } } +#[cfg_attr(not(dtb), expect(dead_code))] pub fn travel_interrupt_ctrl(fdt: &Fdt) { if let Some(root_intr_parent) = fdt .root() @@ -84,19 +86,6 @@ pub fn travel_interrupt_ctrl(fdt: &Fdt) { } } -#[allow(unused)] -pub fn register_memory_ranges(dt: &Fdt) { - for chunk in dt.memory().regions() { - if let Some(size) = chunk.size { - register_memory_region( - chunk.starting_address as usize, - size, - BootloaderMemoryKind::Free, - ); - } - } -} - pub fn register_dev_memory_ranges(dt: &Fdt) { if cfg!(target_arch = "aarch64") { // work around for qemu-arm64 @@ -186,6 +175,7 @@ pub fn get_mmio_address(fdt: &Fdt, _device: &FdtNode, region: &MemoryRegion) -> Some(mapped_addr) } +#[cfg_attr(not(dtb), expect(dead_code))] pub fn interrupt_parent<'a>(fdt: &'a Fdt, node: &'a FdtNode) -> Option> { // FIXME traverse device tree up node.interrupt_parent() @@ -193,6 +183,7 @@ pub fn interrupt_parent<'a>(fdt: &'a Fdt, node: &'a FdtNode) -> Option Option { let interrupts = node.property("interrupts").unwrap(); let parent_interrupt_cells = interrupt_parent(fdt, node) @@ -214,6 +205,7 @@ pub fn get_interrupt(fdt: &Fdt, node: &FdtNode, idx: usize) -> Option { } } +#[cfg_attr(not(dtb), expect(dead_code))] pub fn diag_uart_range<'a>(dtb: &'a Fdt) -> Option<(usize, usize, bool, bool, &'a str)> { let stdout_path = dtb.chosen().stdout()?; let uart_node = stdout_path.node(); diff --git a/src/main.rs b/src/main.rs index 5212db758e..ca28693e3a 100644 --- a/src/main.rs +++ b/src/main.rs @@ -48,7 +48,6 @@ mod allocator; /// ACPI table parsing mod acpi; -#[cfg(dtb)] mod dtb; /// Logical CPU ID and bitset types diff --git a/src/scheme/mod.rs b/src/scheme/mod.rs index 541e7ec60d..6de078695a 100644 --- a/src/scheme/mod.rs +++ b/src/scheme/mod.rs @@ -35,9 +35,7 @@ use crate::{ syscall::usercopy::{UserSliceRo, UserSliceRw, UserSliceWo}, }; -use self::acpi::AcpiScheme; -#[cfg(dtb)] -use self::dtb::DtbScheme; +use self::{acpi::AcpiScheme, dtb::DtbScheme}; use self::{ debug::DebugScheme, @@ -54,7 +52,7 @@ use self::{ /// When compiled with the "acpi" feature - `acpi:` - allows drivers to read a limited set of ACPI tables. pub mod acpi; -#[cfg(dtb)] + pub mod dtb; /// `debug:` - provides access to serial console @@ -158,8 +156,9 @@ fn init_schemes() -> RwLock> { insert_globals(&[Acpi]); } - #[cfg(dtb)] - insert_globals(&[Dtb]); + if cfg!(dtb) { + insert_globals(&[Dtb]); + } } let next_id = SCHEME_LIST_NEXT_ID.fetch_add(1, Ordering::Relaxed); handles.insert(SchemeId(next_id), Handle::Scheme(KernelSchemes::SchemeMgr)); @@ -418,7 +417,6 @@ pub const ALL_KERNEL_SCHEMES: &[GlobalSchemes] = &[ GlobalSchemes::Sys, GlobalSchemes::Proc, GlobalSchemes::Acpi, - #[cfg(dtb)] GlobalSchemes::Dtb, ]; @@ -445,10 +443,7 @@ impl SchemeExt for GlobalSchemes { Self::Sys => &SysScheme, Self::Proc => &ProcScheme, Self::Acpi => &AcpiScheme, - #[cfg(dtb)] Self::Dtb => &DtbScheme, - #[cfg(not(dtb))] - Self::Dtb => panic!("Unknown global scheme"), } } fn scheme_id(self) -> SchemeId { @@ -461,10 +456,7 @@ pub fn init_globals() { if cfg!(feature = "acpi") { AcpiScheme::init(); } - #[cfg(dtb)] - { - DtbScheme::init(); - } + DtbScheme::init(); IrqScheme::init(); } diff --git a/src/startup/memory.rs b/src/startup/memory.rs index e3b97cba52..298760f3c8 100644 --- a/src/startup/memory.rs +++ b/src/startup/memory.rs @@ -148,7 +148,6 @@ fn align_down(x: usize) -> usize { fn register_memory_from_kernel_args(args: &KernelArgs) { register_bootloader_areas(args.areas_base as usize, args.areas_size as usize); - #[cfg(dtb)] if let Some(dt) = args.dtb() { crate::dtb::register_dev_memory_ranges(&dt); } diff --git a/src/startup/mod.rs b/src/startup/mod.rs index ae2a979833..d59c7af691 100644 --- a/src/startup/mod.rs +++ b/src/startup/mod.rs @@ -103,7 +103,6 @@ impl KernelArgs { } } - #[cfg(dtb)] pub(crate) fn dtb(&self) -> Option> { if self.hwdesc_base != 0 { let data = unsafe {