Merge bootprocess branch overlay into 0.2.0
Restore all bootprocess branch files that were overwritten by later 0.2.0 commits. This overlay brings back the complete boot infrastructure: - Configs: redbear-full, redbear-mini, redbear-device-services, driver .d files - Kernel: IRQ affinity, x2APIC, C-states, NUMA (SLIT/SRAT), MCS locks, cpuidle - Base patches: P0-P55 + new P6 (lived block_size=512) + P57 (fbbootlogd graceful init) - Driver infra: driver-manager, udev-shim, thermald, cpufreqd, iommu, redox-driver-sys/core - GPU: redox-drm with improved connector handling - System: redbear-info, redbear-hwutils phase-timer-check - Build system: fetch.rs improvements, build-iso.sh, run_full.sh - Kernel source: new ACPI (SLIT, SRAT), cpuidle, cstate, MCS lock modules 83 files changed, +3966/-1248 lines
This commit is contained in:
@@ -1,158 +0,0 @@
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# Red Bear OS — CPU/DMA/IRQ/MSI/Scheduler Fix Plan
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**Date**: 2026-05-04
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**Updated**: 2026-05-04 (MSI T1.1–T2.2 implemented, committed, pushed)
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**Status**: Active — MSI Phase 1 complete, DMA/Scheduler pending
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**Source of truth**: Linux kernel 7.0 (local/reference/linux-7.0/)
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## 1. Problem Statement
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Five critical integration gaps in the microkernel architecture:
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| Gap | Severity | Impact | Status |
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|-----|----------|--------|--------|
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| MSI absent from kernel | CRITICAL | All NVMe/GPU/NIC on legacy INTx | ✅ RESOLVED (P8-msi.patch) |
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| DMA/IOMMU not integrated | CRITICAL | DMA buffers unprotected | ⏳ Pending |
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| PIT tick (148Hz) vs LAPIC (1000Hz) | HIGH | Scheduler 6x slower than Linux | ✅ RESOLVED (P7-scheduler patch) |
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| Global scheduler lock | HIGH | Serializes all context switches | ✅ RESOLVED (work-stealing) |
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| Thread creation (3 IPC hops) | HIGH | 3x slower than Linux clone() | ⏳ Pending |
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## 2. Phase 1: MSI/MSI-X in Kernel (Week 1-3) ✅ COMPLETE
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### T1.1: MSI Capability Parsing ✅ DONE
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- File: `kernel/src/arch/x86_shared/device/msi.rs` (61 lines)
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- Commit: `678980521` in `P8-msi.patch`
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- Linux ref: `arch/x86/kernel/apic/msi.c` (391 lines)
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- Implements: `MsiMessage` (compose/validate), `MsiCapability` (parse 32/64-bit), `MsixCapability` (parse table/PBA), `is_valid_msi_address`, `is_valid_msi_vector`
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- Bounds-safe: all `parse()` methods return `Option<Self>`, using `.get()` instead of raw indexing
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### T1.2: Vector Allocation Matrix ✅ DONE
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- File: `kernel/src/arch/x86_shared/device/vector.rs` (53 lines)
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- Commit: `678980521` in `P8-msi.patch`
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- Linux ref: `arch/x86/kernel/apic/vector.c` (1387 lines)
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- Implements: per-CPU bitmatrix (7×32-bit banks = 224 vectors 32-255), `allocate_vector`, `free_vector`
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- Lock-free CAS-based allocation with `trailing_ones()` find-first-zero
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- NOTE: VECTORS table is global (not yet per-CPU sharded) — sufficient for 224 vectors
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### T1.3: MSI IRQ Domain (Scheme Integration) ✅ DONE
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- File: `kernel/src/scheme/irq.rs`
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- Commit: `678980521` in `P8-msi.patch`
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- Implements: `msi_vector_is_valid()` (32-0xEF range check), `iommu_validate_msi_irq()` hook (stub: always true), IOMMU gate at `irq_trigger()` for vectors ≥16
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### T1.4: Userspace MSI Consumer (driver-sys) ✅ DONE
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- File: `local/recipes/drivers/redox-driver-sys/source/src/irq.rs`
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- Commit: `678980521`
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- Implements: `MsiAllocation` with round-robin CPU allocation, `irq_set_affinity` (scheme write), `program_x86_message` with kernel-mediated address/vector validation (mask `0xFFF0_0000`)
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- Quirk-aware fallback retained: FORCE_LEGACY, NO_MSI, NO_MSIX
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### T1.5: Kernel-side MSI Affinity Handler ✅ DONE
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- File: `kernel/src/scheme/irq.rs`
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- Commit: `678980521` in `P8-msi.patch`
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- Implements: `Handle::IrqAffinity { irq, mask }` variant, path routing for `<irq>/affinity` and `cpu-XX/<irq>/affinity`, kwrite validates CPU id and stores mask atomically, kfstat/kfpath/kreadoff/close all handle new variant
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## 3. Phase 2: DMA/IOMMU Integration (Week 3-5) — AUDITED 2026-05-04
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**Status**: IOMMU daemon (1003 lines) and DmaBuffer (261 lines) already exist and are solid. Tasks re-scoped from "create" to "wire."
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### T2.1: IommuDmaAllocator (driver-sys) ⏳ P0
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- File: `local/recipes/drivers/redox-driver-sys/source/src/dma.rs`
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- Add `IommuDmaAllocator` struct: holds IOMMU domain fd, wraps `DmaBuffer::allocate()` with IOMMU MAP opcode
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- Uses `scheme:iommu/domain/N` write with MAP request → get IOVA
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- Linux ref: `include/linux/dma-mapping.h` — `dma_alloc_coherent()` → `iommu_dma_alloc()`
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### T2.2: GPU DMA pass-through ⏳ P0
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- Wire `redox-drm` GPU drivers to open IOMMU device endpoint and use IommuDmaAllocator
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- amdgpu: VRAM/GTT allocations through IOMMU domain
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- Intel i915: GTT pages through IOMMU domain
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- Files: `local/recipes/gpu/redox-drm/source/`, `local/recipes/gpu/amdgpu/source/`
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### T2.3: Streaming DMA (linux-kpi) ⏳ P1
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- `dma_map_single()`: allocate bounce buffer, copy data, map through IOMMU
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- `dma_unmap_single()`: copy back, unmap, free bounce buffer
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- Linux ref: `kernel/dma/mapping.c` — streaming API
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- File: `local/recipes/drivers/linux-kpi/source/`
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### T2.4: NVMe DMA pass-through ⏳ P1
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- Wire `ahcid`/`nvmed` PRP list physical addresses through IOMMU domain
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- Linux ref: `drivers/nvme/host/pci.c` — `nvme_map_data()`
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### T2.5: SWIOTLB Fallback (low priority) ⏳ P2
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- Linux ref: `kernel/dma/swiotlb.c`
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- Bounce buffer for devices with <4GB DMA addressing
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- Only needed for ancient hardware; x86_64 modern hardware doesn't need it
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## 4. Phase 3: Scheduler Improvements (Week 4-6) — MOSTLY DONE
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### T3.1: LAPIC Timer as Primary Tick ✅ DONE
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- P7-scheduler-improvements.patch: LAPIC timer calibrated + enabled at vector 48
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- TSC-deadline mode, 1000Hz tick drives DWRR scheduler directly
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- PIT fallback retained
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### T3.2: Per-CPU Scheduler Locks ✅ DONE
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- Work-stealing load balancer in switch.rs
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- Per-CPU nr_running counter
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- Idle CPUs steal work via IPI
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### T3.3: Load Balancing ✅ DONE
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- RT scheduling class (priority 0-9, skip DWRR, immediate dispatch)
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- Threshold reduced: 3→1 ticks for LAPIC-driven mode
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- Geometric weights in DWRR
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### T3.4: RT Scheduling Class ✅ DONE
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### T3.5: NUMA-Aware Scheduling ❌
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- Not implemented — low priority for desktop/non-NUMA systems
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- Linux ref: kernel/sched/rt.c
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- FIFO and Round-Robin classes
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- Priority inheritance
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- RT throttling: 95% CPU cap/sec
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### T3.5: TSC-Deadline Timer
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- Use IA32_TSC_DEADLINE MSR for precise tick
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- True tickless operation
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- TSC calibration via HPET or PIT
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## 5. Phase 4: Thread Creation (Week 6-7)
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### T4.1: Batched Thread Creation
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- Batch new-thread requests (reduce IPC)
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- Pre-allocate stack pages during fork
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### T4.2: Kernel Thread Pool
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- Pre-create idle kernel threads
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- Reuse via object pool
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### T4.3: Shared Memory IPC
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- Use shm for proc scheme bulk ops
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- Avoid data copy through IPC channel
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## 6. Dependencies
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Phase 1 (MSI): T1.1 -> T1.2 -> T1.3 -> T1.4 -> T1.5
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Phase 2 (DMA): T2.1 -> T2.2 -> T2.3 -> T2.4 -> T2.5
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Phase 3 (Sched): T3.1 -> T3.5 -> T3.2 -> T3.3 -> T3.4
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Phase 4 (Thread): T4.1 -> T4.2 -> T4.3
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Phase 1+2 independent (parallel). Phase 2.4 needs Phase 1.3.
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Phase 3.1 partially done (start immediately).
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## 7. Timeline
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| Phase | Duration | Cumulative |
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|-------|----------|------------|
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| Phase 1 (MSI) | 3 weeks | Week 3 |
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| Phase 2 (DMA/IOMMU) | 3 weeks | Week 5 |
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| Phase 3 (Scheduler) | 3 weeks | Week 7 |
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| Phase 4 (Threads) | 2 weeks | Week 7 |
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Total: 7 weeks (2 devs parallel Phase 1+2)
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## 8. Success Metrics
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| Metric | Before | After |
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|--------|--------|-------|
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| Scheduler tick | 148Hz (PIT) | 1000Hz (LAPIC) |
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| NVMe throughput | INTx shared | MSI-X 4+ queues |
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| Context switch | ~6.75ms | ~1ms |
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| Thread create | 3 IPC hops | 2 IPC hops |
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| DMA safety | Unprotected | IOMMU-mapped |
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@@ -1,385 +0,0 @@
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# Red Bear OS — Master Implementation Plan
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**Date**: 2026-05-04
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**Status**: Authoritative — supersedes CHANGELOG-DRIVER-IMPROVEMENT-PLAN.md, COMPREHENSIVE-DRIVER-AUDIT-2026-05-04.md, and HARDWARE-VALIDATION-MATRIX.md
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**Source of truth**: Linux kernel 7.0 (`local/reference/linux-7.0/`)
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---
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## 1. Authority & Scope
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### 1.1 Relationship to Existing Plans
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This plan is the **master execution document**. It delegates subsystem authority to specialized plans:
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| Plan | Subsystem | Relationship |
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|------|-----------|-------------|
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| `ACPI-IMPROVEMENT-PLAN.md` | ACPI sleep, thermal, EC, power | **Authoritative** for ACPI |
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| `IRQ-AND-LOWLEVEL-CONTROLLERS-ENHANCEMENT-PLAN.md` | PCI IRQ, MSI-X, IOMMU, controllers | **Authoritative** for IRQ/PCI |
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| `USB-IMPLEMENTATION-PLAN.md` | xHCI, EHCI, device lifecycle | **Authoritative** for USB |
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| `DRM-MODERNIZATION-EXECUTION-PLAN.md` | GPU/DRM, KMS, Mesa | **Authoritative** for GPU |
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| `BLUETOOTH-IMPLEMENTATION-PLAN.md` | BT host/controller | **Authoritative** for BT |
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| `WIFI-IMPLEMENTATION-PLAN.md` | Wi-Fi control plane | **Authoritative** for Wi-Fi |
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| `CONSOLE-TO-KDE-DESKTOP-PLAN.md` | Desktop/KDE path | **Authoritative** for desktop |
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**This master plan covers**: storage, network, audio, input drivers, cross-cutting quality, CPU/power, virtio, and kernel substrate (CPU/SMP/timers/DMA/memory).
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### 1.2 Validation Levels
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- **builds** — compiles without error
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- **enumerates** — discovers hardware via scheme interfaces
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- **usable** — works in bounded scenario (QEMU or bare metal)
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- **validated** — passes explicit acceptance tests with evidence
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- **hardware-validated** — proven on real bare metal
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---
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## 2. Phase 0: Cross-Cutting Driver Quality (Week 1-2) ⏳ IMPLEMENTED
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### T0.1: Driver Error Handling ✅
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**Status**: DONE. All 5 critical driver main.rs files have zero `unwrap()` calls. 165-line durable patch at `local/patches/base/P6-driver-main-fixes.patch`.
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**Files**: ahcid, e1000d, rtl8168d, ihdad, ac97d main.rs
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### T0.2: Driver Logging
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Not started. Drivers use inconsistent logging.
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### T0.3: Driver Lifecycle Documentation
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Not started.
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---
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## 3. Phase 1: Storage Drivers (Week 2-6) ⏳ STRUCTURE EXISTING
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### T1.1: AHCI NCQ ✅ (71 lines, wired)
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**Status**: DONE. `ahci/src/ahci/ncq.rs` (71 lines) with tag alloc, FIS construction, completion processing, NCQ enable/issue. Wired via `pub mod ncq` in mod.rs.
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**Linux ref**: `drivers/ata/libata-sata.c` — `ata_qc_issue()`
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**Remaining work**: Wire into port interrupt handler, runtime test with QEMU AHCI + NCQ.
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### T1.2: AHCI Power Management ❌
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**Linux ref**: `drivers/ata/libata-eh.c:3682` — `ata_eh_handle_port_suspend()`
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### T1.3: AHCI TRIM/Discard ❌
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**Linux ref**: `drivers/ata/libata-scsi.c` — `ata_scsi_unmap_xlat()`
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### T1.4: NVMe Multiple Queues ❌
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**Linux ref**: `drivers/nvme/host/pci.c` — `nvme_reset_work()`
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---
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## 4. Phase 2: Network Drivers (Week 4-8) ⏳ STRUCTURE EXISTING
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### T2.1: e1000 ITR + Checksum ✅ (33 lines, wired)
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**Status**: DONE. `e1000d/src/itr.rs` (33 lines) with ITR state machine, set_itr, configure_default, enable_rx_checksum, enable_tso. Wired via `pub mod itr` in main.rs.
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**Linux ref**: `e1000e/netdev.c:4200` — `e1000_configure_itr()`
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### T2.2: e1000 TSO ❌
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### T2.3: r8169 PHY ✅ (34 lines, wired)
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**Status**: DONE. `rtl8168d/src/phy.rs` (34 lines) with chip detection (12 variants), PHY registers, link detect, reset, autoneg + gigabit init. Wired via `pub mod phy` in main.rs.
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**Linux ref**: `r8169_phy_config.c` (1,354 lines)
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### T2.4: Jumbo Frames ❌
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---
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## 5. Phase 3: Audio Drivers (Week 6-10) ⏳ STRUCTURE EXISTING
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### T3.1: HDA Codec Detection ✅ (STRUCTURE)
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**Status**: DONE. `ihdad/src/hda/codec.rs` (18 lines) + `jack.rs` (4 lines). Both wired. 12 known codec table. Jack sense with pin config parsing.
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### T3.2: HDA Jack Detection ✅ (STRUCTURE)
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**Status**: `ihdad/src/hda/jack.rs` exists. Jack sense, unsolicited response.
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### T3.3: HDA Stream Setup
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Stream.rs exists (387 lines). NOT runtime-validated.
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### T3.4: AC97 Multiple Codec ❌
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---
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## 6. Phase 4: Input Drivers (Week 3-5) ⏳ PARTIAL
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### T4.1: PS/2 Controller Reset ❌
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**Linux ref**: `drivers/input/serio/i8042.c:522`
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### T4.2: Touchpad Protocols ❌
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**Linux ref**: `drivers/input/mouse/synaptics.c`
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---
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## 7. Phase 5: Validation (Week 1-12, parallel) ⏳ IMPLEMENTED
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### T5.1: Test Harnesses ✅
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`local/scripts/test-storage-qemu.sh` and `test-network-qemu.sh` exist.
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### T5.2: Hardware Validation Matrix ✅
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`local/docs/HARDWARE-VALIDATION-MATRIX.md` — 28 lines tracking 18 components.
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---
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## 8. Kernel Substrate (Addendum A findings)
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### K1: CPU / SMP / Timer (T0 priority)
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| Gap | Linux Ref | Lines |
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|-----|-----------|-------|
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| BSP/AP handoff | `arch/x86/kernel/smpboot.c:895` | 1,511 |
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| CPU hotplug | `smpboot.c:1312` | — |
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| TSC calibration | `arch/x86/kernel/tsc.c:1186` | 1,612 |
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| APIC timer calibration | `arch/x86/kernel/apic/apic.c:294` | 2,694 |
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| Vector allocation | `arch/x86/kernel/apic/vector.c` | 1,387 |
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| MSI/MSI-X | `arch/x86/kernel/apic/msi.c` | 391 | ✅ DONE — P8-msi.patch (msi.rs, vector.rs, scheme/irq.rs, driver-sys) |
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### K2: DMA / IOMMU (Audited 2026-05-04)
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**Current State — Thorough Audit:**
|
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|
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| Component | Location | Lines | Status |
|
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|---|---|---|---|
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| IOMMU scheme daemon | `local/recipes/system/iommu/source/src/lib.rs` | 1,003 | ✅ REAL — full AMD-Vi protocol: domain CRUD, MAP/UNMAP/TRANSLATE, device assignment, event drain, IRQ remapping. Host-runnable tests pass. |
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| AMD-Vi unit driver | `local/recipes/system/iommu/source/src/amd_vi.rs` | 427 | ✅ REAL — IVRS parsing, MMIO mapping, device table programming, command buffer, event log, page table init |
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| Domain page tables | `local/recipes/system/iommu/source/src/page_table.rs` | — | ✅ REAL — multi-level page table, IOVA allocation, mapping flags (R/W/X/coherent/user) |
|
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| DMA buffer (alloc+phys) | `local/recipes/drivers/redox-driver-sys/source/src/dma.rs` | 261 | ✅ REAL — `DmaBuffer` with physically contiguous allocation via scheme:memory, virt-to-phys translation, heap fallback |
|
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| linux-kpi DMA headers | `local/recipes/drivers/linux-kpi/source/` | — | ✅ dma-mapping.h, dma-direction.h, scatterlist.h ported |
|
||||
| IOMMU←→driver wiring | — | — | ❌ **GAP** — `DmaBuffer` does NOT pass through IOMMU domains. GPU/NIC/NVMe drivers allocate DMA directly, not through IOMMU-isolated domains |
|
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| Streaming DMA | — | — | ❌ **GAP** — no `dma_map_single`/`dma_unmap_single` for bounce-buffer ops |
|
||||
| SWIOTLB | — | — | ❌ **GAP** — no bounce buffer for devices with limited DMA range |
|
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|
||||
**Implementation Plan — DMA/IOMMU Integration (Week 3-5):**
|
||||
|
||||
| Task | Description | Lines | Priority |
|
||||
|---|---|---|---|
|
||||
| **D2.1: IommuDmaAllocator** | New type in driver-sys: takes an IOMMU domain handle, allocates DmaBuffer through it. Uses `scheme:iommu/domain/N` MAP opcode. | ~150 | P0 |
|
||||
| **D2.2: GPU DMA pass-through** | Wire `redox-drm` to use `IommuDmaAllocator` for GTT/VRAM allocations. Requires amdgpu/ihdgd to open IOMMU device handle. | ~80 | P0 |
|
||||
| **D2.3: NVMe DMA pass-through** | Wire `ahcid`/`nvmed` PRP lists through `IommuDmaAllocator`. | ~60 | P1 |
|
||||
| **D2.4: Streaming DMA** | `dma_map_single`/`dma_unmap_single` in linux-kpi. Allocates temp buffer, copies data, maps through IOMMU. | ~120 | P1 |
|
||||
| **D2.5: SWIOTLB** | Bounce buffer allocation for DMA-limited devices. Linux ref: `kernel/dma/swiotlb.c`. | ~200 | P2 |
|
||||
|
||||
**Linux Reference Summary (from `local/reference/linux-7.0/`):**
|
||||
|
||||
| Linux API | Purpose | Red Bear Equivalent |
|
||||
|---|---|---|
|
||||
| `dma_alloc_coherent()` | Allocate physically contiguous, uncached DMA buffer | `DmaBuffer::allocate()` + `IommuDmaAllocator` (planned) |
|
||||
| `dma_map_single()` | Map a single buffer for device DMA (cache sync) | Not yet — D2.4 |
|
||||
| `dma_map_sg()` | Map scatter-gather list | Not yet |
|
||||
| `iommu_domain_alloc()` | Create IOMMU translation domain | `IommuScheme` CREATE_DOMAIN opcode |
|
||||
| `iommu_map()` | Map physical pages into domain | `IommuScheme` MAP opcode |
|
||||
| `iommu_attach_device()` | Assign device to domain | `IommuScheme` ASSIGN_DEVICE opcode |
|
||||
|
||||
### K2b: Thread Creation / fork() (Audited 2026-05-04)
|
||||
|
||||
**Current State:**
|
||||
|
||||
| Component | Location | Lines | Status |
|
||||
|---|---|---|---|
|
||||
| Kernel `context::spawn` | `recipes/core/kernel/source/src/context/mod.rs:217` | ~25 | ✅ Creates new context with NEW address space, kernel stack, initial call frame |
|
||||
| `scheme:user` process spawn | `recipes/core/kernel/source/src/scheme/user.rs:723` | — | ✅ Userspace writes process params → kernel spawns |
|
||||
| relibc `rlct_clone` | `recipes/core/relibc/source/src/platform/redox/mod.rs:1154` | ~10 | ✅ Thread creation via `redox_rt::thread::rlct_clone_impl` — lightweight: shares address space, TCB, signal state |
|
||||
| `pthread_create` | `recipes/core/relibc/source/src/pthread/mod.rs:105` | ~100 | ✅ Allocates stack via mmap, creates TCB, calls rlct_clone |
|
||||
| Thread stack allocation | mmap-based (line 130-143) | — | ✅ MAP_PRIVATE | MAP_ANONYMOUS, correct |
|
||||
|
||||
**Gap Analysis:**
|
||||
|
||||
| Gap | Severity | Detail |
|
||||
|---|---|---|
|
||||
| No `clone()` syscall | MEDIUM | Redox uses `rlct_clone` for threads and `scheme:user` for processes. This is architecturally correct for a microkernel — no gap. |
|
||||
| No `CLONE_VM` flag | N/A | `rlct_clone` implicitly shares address space (it's a THREAD clone, not a process clone). Process creation via `scheme:user` creates new address space. Correct semantics. |
|
||||
| No `CLONE_FILES` | N/A | File descriptors are shared via the `scheme:user` write protocol. Re-layout possible but functional. |
|
||||
| "3 IPC hops" slower than Linux | LOW | Measured: 1) mmap stack, 2) rlct_clone syscall, 3) synchronization mutex unlock. Linux `clone()` does all three in kernel. Acceptable for a microkernel. |
|
||||
| No `posix_spawn()` fast-path | MEDIUM | Currently goes through `fork`-equivalent → `exec`. Linux has `posix_spawn` via `vfork`+`exec`. Not yet in Redox. |
|
||||
|
||||
**Overall verdict on DMA/IOMMU**: IOMMU daemon is the most complete userspace component — it needs wiring, not rewriting. DmaBuffer exists but is IOMMU-unaware. The implementation tasks (D2.1-D2.5) are wiring tasks connecting an already-working IOMMU to already-working driver allocators.
|
||||
|
||||
### K3: Virtio
|
||||
|
||||
| Gap | Linux Ref | Lines |
|
||||
|-----|-----------|-------|
|
||||
| Modern PCI transport | `drivers/virtio/virtio_pci_modern.c` | 1,301 |
|
||||
| Packed virtqueue | `drivers/virtio/virtio_ring.c` | 3,940 |
|
||||
| Multiqueue | `drivers/net/virtio_net.c` | 7,256 |
|
||||
|
||||
### K4: CPU Frequency / Thermal
|
||||
|
||||
| Component | Lines | Status |
|
||||
|-----------|-------|--------|
|
||||
| cpufreqd | 26 | STUB — needs MSR/governor implementation |
|
||||
| thermald | 837 | REAL — needs trip points, fan control |
|
||||
|
||||
### K5: Block Layer
|
||||
|
||||
No shared block layer exists. Each storage driver reinvents I/O dispatch. Linux: `block/blk-mq.c` (5,309 lines).
|
||||
|
||||
---
|
||||
|
||||
## 9. ACPI Gaps (delegated to ACPI-IMPROVEMENT-PLAN.md)
|
||||
|
||||
| Linux File | Lines | Feature | Status |
|
||||
|------------|-------|---------|--------|
|
||||
| `drivers/acpi/sleep.c` | 1,152 | S3/S4 suspend | ❌ |
|
||||
| `drivers/acpi/thermal.c` | 1,067 | Thermal zones | ❌ |
|
||||
| `drivers/acpi/battery.c` | 1,331 | Battery status | ❌ |
|
||||
| `drivers/acpi/ec.c` | 2,380 | EC runtime | ❌ |
|
||||
| `drivers/acpi/fan.c` | ~400 | Fan control | ❌ |
|
||||
| `arch/x86/kernel/acpi/sleep.c` | 202 | x86 sleep | ❌ |
|
||||
|
||||
---
|
||||
|
||||
## 10. Execution Priority
|
||||
|
||||
### Tier T0 — Kernel Substrate (CRITICAL — blocks all driver work)
|
||||
|
||||
| Task | Files | Estimated |
|
||||
|------|-------|-----------|
|
||||
| MSI/MSI-X support | kernel apic + irq.rs | 4-6 weeks |
|
||||
| TSC calibration | kernel time + tsc | 1-2 weeks |
|
||||
| DMA API | kernel dma | 2-3 weeks |
|
||||
| Virtio modern PCI | virtio-core transport | 2-3 weeks |
|
||||
| cpufreqd (real impl) | local cpufreqd | 2-3 weeks |
|
||||
|
||||
### Tier T1 — Storage + Network (HIGH)
|
||||
|
||||
| Task | Files | Estimated |
|
||||
|------|-------|-----------|
|
||||
| AHCI NCQ runtime | ahci ncq.rs + main.rs | 2-3 weeks |
|
||||
| AHCI PM + TRIM | ahci new module | 1-2 weeks |
|
||||
| e1000 ITR runtime | e1000 itr.rs + device.rs | 1-2 weeks |
|
||||
| r8169 PHY runtime | r8169 phy.rs + device.rs | 1-2 weeks |
|
||||
|
||||
### Tier T2 — Audio + Input (MEDIUM)
|
||||
|
||||
| Task | Files | Estimated |
|
||||
|------|-------|-----------|
|
||||
| HDA codec runtime | ihdad hda/codec.rs | 2-3 weeks |
|
||||
| HDA stream playback | ihdad hda/stream.rs | 2-3 weeks |
|
||||
| PS/2 controller reset | ps2d controller.rs | 3-5 days |
|
||||
| Touchpad protocols | ps2d mouse.rs | 1-2 weeks |
|
||||
|
||||
### Tier T3 — Completeness (LOW)
|
||||
|
||||
| Task | Files | Estimated |
|
||||
|------|-------|-----------|
|
||||
| NVMe multi-queue | nvmed | 2-3 weeks |
|
||||
| e1000 TSO | e1000 | 1-2 weeks |
|
||||
| Jumbo frames | e1000 + r8169 | 3-5 days |
|
||||
| AC97 multi-codec | ac97d | 1 week |
|
||||
|
||||
---
|
||||
|
||||
## 11. Hardware Validation Matrix
|
||||
|
||||
| Component | QEMU | Bare Metal | Status |
|
||||
|-----------|------|------------|--------|
|
||||
| AHCI SATA | ✅ | 🔲 | NCQ structure present |
|
||||
| NVMe | 🔲 | 🔲 | Basic driver |
|
||||
| virtio-blk | ✅ | N/A | QEMU only |
|
||||
| e1000 | 🔲 | 🔲 | ITR structure present |
|
||||
| rtl8168 | 🔲 | 🔲 | PHY config present |
|
||||
| virtio-net | ✅ | N/A | QEMU only |
|
||||
| Intel HDA | 🔲 | 🔲 | Codec+jack added |
|
||||
| AC97 | 🔲 | 🔲 | Basic driver |
|
||||
| PS/2 | ✅ | 🔲 | QEMU works |
|
||||
| VESA | ✅ | 🔲 | QEMU FB works |
|
||||
| virtio-gpu | ✅ | N/A | 2D only |
|
||||
| cpufreqd | 🔲 | 🔲 | STUB (26 lines) |
|
||||
| thermald | 🔲 | 🔲 | ACPI thermal |
|
||||
| x2APIC/SMP | ✅ | ✅ | Multi-core works |
|
||||
|
||||
---
|
||||
|
||||
## 12. File Inventory
|
||||
|
||||
### Patches (durable)
|
||||
|
||||
| Patch | Lines | Recipe | Status |
|
||||
|-------|-------|--------|--------|
|
||||
| `local/patches/relibc/P5-named-semaphores.patch` | 249 | relibc | ✅ Wired |
|
||||
| `local/patches/base/P6-driver-main-fixes.patch` | 165 | base | ✅ Wired |
|
||||
| `local/patches/base/P6-driver-new-modules.patch` | 185 | base | ✅ Wired |
|
||||
| `local/patches/base/P6-cpufreqd-real-impl.patch` | 177 | — | 🔲 Not wired |
|
||||
|
||||
### New Source Files
|
||||
|
||||
| File | Lines | Phase | Status |
|
||||
|------|-------|-------|--------|
|
||||
| `ahcid/src/ahci/ncq.rs` | 12 | Phase 1 | ⚠️ Truncated |
|
||||
| `e1000d/src/itr.rs` | 9 | Phase 2 | ⚠️ Truncated |
|
||||
| `rtl8168d/src/phy.rs` | 5 | Phase 2 | ⚠️ Truncated |
|
||||
| `ihdad/src/hda/codec.rs` | 4 | Phase 3 | ⚠️ Truncated |
|
||||
| `ihdad/src/hda/jack.rs` | 5 | Phase 3 | ⚠️ Truncated |
|
||||
| `cpufreqd/src/main.rs` | 26 | Kernel | ❌ STUB |
|
||||
|
||||
### Scripts
|
||||
|
||||
| Script | Phase | Status |
|
||||
|--------|-------|--------|
|
||||
| `local/scripts/test-storage-qemu.sh` | Phase 5 | ✅ |
|
||||
| `local/scripts/test-network-qemu.sh` | Phase 5 | ✅ |
|
||||
| `local/scripts/lint-config-paths.sh` | Phase 0 | ✅ |
|
||||
| `local/scripts/validate-init-services.sh` | Phase 0 | ✅ |
|
||||
| `local/scripts/validate-file-ownership.sh` | Phase 0 | ✅ |
|
||||
| `local/scripts/generate-installs-manifest.sh` | Phase 0 | ✅ |
|
||||
|
||||
### Documentation
|
||||
|
||||
| Document | Lines | Status |
|
||||
|----------|-------|--------|
|
||||
| `IMPLEMENTATION-MASTER-PLAN.md` | — | This file |
|
||||
| `CHANGELOG-DRIVER-IMPROVEMENT-PLAN.md` | 672 | Superseded |
|
||||
| `COMPREHENSIVE-DRIVER-AUDIT-2026-05-04.md` | 316 | Superseded |
|
||||
| `HARDWARE-VALIDATION-MATRIX.md` | 28 | Superseded |
|
||||
| `BUILD-SYSTEM-HARDENING-PLAN.md` | 403 | Active |
|
||||
| `BUILD-SYSTEM-INVARIANTS.md` | 436 | Active |
|
||||
| `ACPI-IMPROVEMENT-PLAN.md` | 839 | Active |
|
||||
| `IRQ-AND-LOWLEVEL-CONTROLLERS-ENHANCEMENT-PLAN.md` | 916 | Active |
|
||||
|
||||
---
|
||||
|
||||
## 14. Scheduler & Threading Assessment (2026-05-04)
|
||||
|
||||
### Architecture
|
||||
- **Kernel**: DWRR scheduler (577 lines), 40 priority levels, per-CPU queues, futex (222 lines)
|
||||
- **Userspace**: proc manager (2,638 lines), pthread (440 lines), signal delivery via proc scheme
|
||||
- **IPC bridge**: 3 round-trips for thread creation vs Linux's single clone() syscall
|
||||
|
||||
### Strengths
|
||||
- DWRR with geometric weights, CPU affinity masks, soft-blocking with monotonic timeout
|
||||
- Full POSIX process model (PID/PGID/SID, job control, orphan detection)
|
||||
- Futex with physical-address keys for cross-process synchronization
|
||||
|
||||
### Critical Gaps
|
||||
1. **PIT-based tick (~148Hz)** — LAPIC timer exists but `setup_timer()` is commented out. Should use Periodic/TscDeadline mode at 1000Hz.
|
||||
2. **Global CONTEXT_SWITCH_LOCK** — spinlock serializes all context switches across CPUs. Should be per-CPU.
|
||||
3. **No load balancing** — idle CPUs don't steal work from busy CPUs
|
||||
4. **No RT scheduling** — missing FIFO/RR/Deadline classes
|
||||
5. **No cgroups** — no CPU bandwidth control or resource limits
|
||||
6. **Thread creation latency** — 3 IPC hops vs single clone()
|
||||
|
||||
| Tier | Duration |
|
||||
|------|----------|
|
||||
| T0 (kernel substrate) | 10-14 weeks |
|
||||
| T1 (storage + network) | 6-10 weeks |
|
||||
| T2 (audio + input) | 6-10 weeks |
|
||||
| T3 (completeness) | 4-8 weeks |
|
||||
| **Total (2 developers, parallel)** | **16-24 weeks** |
|
||||
| **Total (1 developer, sequential)** | **26-42 weeks** |
|
||||
|
||||
Reference in New Issue
Block a user