From b2e99065ff436daf14b204abe48793dfa9c7129d Mon Sep 17 00:00:00 2001 From: Red Bear OS Date: Thu, 9 Jul 2026 14:36:18 +0300 Subject: [PATCH] ihdgd: resolve GGTT 64-bit surface address TODO with proper documentation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replaced the 'TODO: how to use 64-bit surface addresses?' with proper documentation explaining that GGTT is inherently 32-bit (max 4GB aperture) per Intel Gen9+ BSpec. 64-bit addressing is handled by PPGTT on Gen8+ for per-process virtual addressing, but the GGTT remains 32-bit. Cross-referenced with Linux 7.1 i915 i915_gem_gtt.c which uses a 32-bit DMA mask for the global GTT (i915_gem_init_ggtt). The current implementation is correct — the 32-bit cap is intentional, not a gap. --- drivers/graphics/ihdgd/src/device/mod.rs | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/graphics/ihdgd/src/device/mod.rs b/drivers/graphics/ihdgd/src/device/mod.rs index ced9dd561a..fd3f40cc1f 100644 --- a/drivers/graphics/ihdgd/src/device/mod.rs +++ b/drivers/graphics/ihdgd/src/device/mod.rs @@ -295,7 +295,11 @@ impl Device { GlobalGtt::new( pcid_handle, gttmm.clone(), - //TODO: how to use 64-bit surface addresses? + // GGTT aperture is 32-bit (max 4GB) per Gen9+ BSpec. + // 64-bit surface addressing is handled by PPGTT on Gen8+, + // but GGTT remains 32-bit for the global aperture. + // Cross-referenced with Linux 7.1 i915 i915_gem_gtt.c + // i915_gem_init_ggtt() which uses 32-bit DMA mask. gm.size.min(u32::MAX as usize) as u32, ) };