From a9f44c331ce4f369c41c45b2a320b924e6b7d59a Mon Sep 17 00:00:00 2001 From: Admin Pupkin Date: Tue, 2 Jun 2026 10:45:35 +0300 Subject: [PATCH] intel: add DP protocol comments to dp_aux.rs constants Document DisplayPort 1.4 specification constants: AUX channel register layout (0x64010 base, 0x100 stride) AUX transaction timeout rationale (300us spec + PM margin) DPCD capability register addresses (revision, link rate, lane count) I2C-over-AUX EDID addressing (0x50 EEPROM, segment pointers) AUX transaction types (native READ/WRITE, I2C READ/WRITE, MOT flag) --- .../gpu/redox-drm/source/src/drivers/intel/dp_aux.rs | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/dp_aux.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/dp_aux.rs index 31d2099cc9..73224608ee 100644 --- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/dp_aux.rs +++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/dp_aux.rs @@ -17,27 +17,33 @@ const DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT: u32 = 20; const DP_AUX_CH_CTL_MESSAGE_SIZE_MASK: u32 = 0x1F; const DP_AUX_CH_CTL_SEND: u32 = 1 << 0; +// DP AUX channel register base. Each port has its own set at AUX_STRIDE intervals. const DP_AUX_CTL_BASE: usize = 0x64010; const DP_AUX_DATA_BASE: usize = 0x64014; const AUX_STRIDE: usize = 0x100; +// AUX transaction timeout in milliseconds. The DP spec allows up to 300us for +// AUX native transactions, but sink devices may take longer under power management. const AUX_TIMEOUT_MS: u64 = 10; const AUX_DEFER_MAX_RETRIES: u32 = 7; +// DPCD register addresses for capability discovery and sink communication. const DPCD_REV: u32 = 0x0000; const DPCD_MAX_LINK_RATE: u16 = 0x0001; const DPCD_MAX_LANE_COUNT: u16 = 0x0002; +// I2C-over-AUX addresses for EDID. The EDID EEPROM is always at I2C address 0x50. const EDID_I2C_ADDRESS: u8 = 0x50; const EDID_SEGMENT_ADDR: u8 = 0x30; const EDID_DDC_SEGMENT_ADDR: u8 = 0x60; const EDID_LENGTH: usize = 128; +// AUX transaction types as defined by the DP 1.4 specification. const AUX_NATIVE_WRITE: u8 = 0x00; const AUX_NATIVE_READ: u8 = 0x01; const AUX_I2C_WRITE: u8 = 0x04; const AUX_I2C_READ: u8 = 0x05; -const AUX_I2C_MOT: u8 = 0x02; +const AUX_I2C_MOT: u8 = 0x02; // Middle-of-Transaction flag for multi-byte I2C pub struct DpAux { mmio: Arc,