From 4b384066f2408c05345986739a648e8064b0c7aa Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Sun, 9 Jun 2024 15:05:47 +0200 Subject: [PATCH] Use pci_types for setting the interrupt line --- Cargo.lock | 4 ++-- pcid/Cargo.toml | 2 +- pcid/src/main.rs | 23 ++++++++++------------- 3 files changed, 13 insertions(+), 16 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index d84e864362..9ce5ed9fb6 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -907,9 +907,9 @@ checksum = "7f0b59668fe80c5afe998f0c0bf93322bf2cd66cafeeb80581f291716f3467f2" [[package]] name = "pci_types" -version = "0.9.0" +version = "0.9.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6f966dfb3dde50a726cc62ae44dc48efd10a211db15296c00cd88550ad8ef24c" +checksum = "d6848549f754bd20aa382ffec0f4f04ba50e55a18ff75a0862bf9e227fe42b57" dependencies = [ "bit_field", "bitflags 2.5.0", diff --git a/pcid/Cargo.toml b/pcid/Cargo.toml index 705daf00fa..864e9a0598 100644 --- a/pcid/Cargo.toml +++ b/pcid/Cargo.toml @@ -20,7 +20,7 @@ fdt = { git = "https://gitlab.redox-os.org/rosehuds/fdt.git" } libc = "0.2" log = "0.4" paw = "1.0" -pci_types = "0.9.0" +pci_types = "0.9.1" plain = "0.2" redox-log = "0.1" redox_syscall = "0.5" diff --git a/pcid/src/main.rs b/pcid/src/main.rs index 4d0cf1e94f..9e674fd437 100644 --- a/pcid/src/main.rs +++ b/pcid/src/main.rs @@ -256,7 +256,7 @@ fn handle_parsed_header(state: Arc, config: &Config, header: PciEndpointH info!(" BAR{}", string); } - let endpoint_header = header.endpoint_header(&state.pcie); + let mut endpoint_header = header.endpoint_header(&state.pcie); // Enable bus mastering, memory space, and I/O space endpoint_header.update_command(&state.pcie, |cmd| { @@ -266,20 +266,17 @@ fn handle_parsed_header(state: Arc, config: &Config, header: PciEndpointH }); // Set IRQ line to 9 if not set - let mut irq; - let interrupt_pin; + let mut irq = 0xFF; + let mut interrupt_pin = 0xFF; - // FIXME use pci_types' update_interrupt once it is released to crates.io - unsafe { - let mut data = state.pcie.read(header.address(), 0x3C); - irq = (data & 0xFF) as u8; - interrupt_pin = ((data & 0x0000_FF00) >> 8) as u8; - if irq == 0xFF { - irq = 9; + endpoint_header.update_interrupt(&state.pcie, |(pin, mut line)| { + if line == 0xFF { + line = 9; } - data = (data & 0xFFFFFF00) | irq as u32; - state.pcie.write(header.address(), 0x3C, data); - }; + irq = line; + interrupt_pin = pin; + (pin, line) + }); let legacy_interrupt_enabled = match interrupt_pin { 0 => false,