From 92e5397efa29bf71b0edf9cc58db21904cb0dec6 Mon Sep 17 00:00:00 2001 From: bjorn3 <17426603+bjorn3@users.noreply.github.com> Date: Fri, 12 Sep 2025 19:32:19 +0200 Subject: [PATCH] Introduce SerialKind::NotPresent --- src/acpi/spcr.rs | 7 ++++--- src/arch/aarch64/debug.rs | 6 ++---- src/arch/aarch64/device/serial.rs | 14 +++++--------- src/arch/riscv64/debug.rs | 6 ++---- src/arch/riscv64/device/serial.rs | 14 +++++--------- src/arch/x86_shared/debug.rs | 14 ++++---------- src/arch/x86_shared/device/serial.rs | 12 ++++++------ src/arch/x86_shared/interrupt/irq.rs | 8 ++------ src/devices/serial.rs | 4 ++++ 9 files changed, 34 insertions(+), 51 deletions(-) diff --git a/src/acpi/spcr.rs b/src/acpi/spcr.rs index 647e1ec00c..be59441e2b 100644 --- a/src/acpi/spcr.rs +++ b/src/acpi/spcr.rs @@ -61,7 +61,7 @@ impl Spcr { return; } - let serial_was_empty = !COM1.lock().is_some(); + let serial_was_empty = !matches!(*COM1.lock(), SerialKind::NotPresent); if spcr.header.revision >= 2 { match spcr.interface_type { 3 => { @@ -78,7 +78,7 @@ impl Spcr { ) }; let serial_port = uart_pl011::SerialPort::new(virt.data(), false); - *COM1.lock() = Some(SerialKind::Pl011(serial_port)) + *COM1.lock() = SerialKind::Pl011(serial_port) } else { log::warn!( "SPCR unsuppoted address for PL011 {:#x?}", @@ -105,7 +105,8 @@ impl Spcr { } else { log::warn!("SPCR unsupported revision {}", spcr.header.revision); } - if serial_was_empty && let Some(ref mut serial_port) = *COM1.lock() { + let mut serial_port = COM1.lock(); + if serial_was_empty && !matches!(*serial_port, SerialKind::NotPresent) { // backfill logs since the heap is loaded if let Some(ref mut early_log) = *LOG.lock() { let (s1, s2) = early_log.read(); diff --git a/src/arch/aarch64/debug.rs b/src/arch/aarch64/debug.rs index 614f6b4b85..163be713df 100644 --- a/src/arch/aarch64/debug.rs +++ b/src/arch/aarch64/debug.rs @@ -3,7 +3,7 @@ use spin::MutexGuard; use crate::{device::serial::COM1, devices::serial::SerialKind}; pub struct Writer<'a> { - serial: MutexGuard<'a, Option>, + serial: MutexGuard<'a, SerialKind>, } impl<'a> Writer<'a> { @@ -14,8 +14,6 @@ impl<'a> Writer<'a> { } pub fn write(&mut self, buf: &[u8]) { - if let Some(ref mut serial) = *self.serial { - serial.write(buf); - } + self.serial.write(buf); } } diff --git a/src/arch/aarch64/device/serial.rs b/src/arch/aarch64/device/serial.rs index 5e4121d687..6a2a9bf094 100644 --- a/src/arch/aarch64/device/serial.rs +++ b/src/arch/aarch64/device/serial.rs @@ -14,15 +14,13 @@ use fdt::Fdt; use log::{error, info}; use syscall::Mmio; -pub static COM1: Mutex> = Mutex::new(None); +pub static COM1: Mutex = Mutex::new(SerialKind::NotPresent); pub struct Com1Irq {} impl InterruptHandler for Com1Irq { fn irq_handler(&mut self, irq: u32) { - if let Some(ref mut serial_port) = *COM1.lock() { - serial_port.receive(); - }; + COM1.lock().receive(); unsafe { trigger(irq); } @@ -31,7 +29,7 @@ impl InterruptHandler for Com1Irq { pub unsafe fn init_early(dtb: &Fdt) { unsafe { - if COM1.lock().is_some() { + if !matches!(*COM1.lock(), SerialKind::NotPresent) { // Hardcoded UART return; } @@ -56,7 +54,7 @@ pub unsafe fn init_early(dtb: &Fdt) { }; match serial_opt { Some(serial) => { - *COM1.lock() = Some(serial); + *COM1.lock() = serial; info!("UART {:?} at {:#X} size {:#X}", compatible, virt, size); } None => { @@ -89,8 +87,6 @@ pub unsafe fn init(fdt: &Fdt) { error!("serial port irq parent not found"); } } - if let Some(ref mut serial_port) = *COM1.lock() { - serial_port.enable_irq(); - } + COM1.lock().enable_irq(); } } diff --git a/src/arch/riscv64/debug.rs b/src/arch/riscv64/debug.rs index 614f6b4b85..163be713df 100644 --- a/src/arch/riscv64/debug.rs +++ b/src/arch/riscv64/debug.rs @@ -3,7 +3,7 @@ use spin::MutexGuard; use crate::{device::serial::COM1, devices::serial::SerialKind}; pub struct Writer<'a> { - serial: MutexGuard<'a, Option>, + serial: MutexGuard<'a, SerialKind>, } impl<'a> Writer<'a> { @@ -14,8 +14,6 @@ impl<'a> Writer<'a> { } pub fn write(&mut self, buf: &[u8]) { - if let Some(ref mut serial) = *self.serial { - serial.write(buf); - } + self.serial.write(buf); } } diff --git a/src/arch/riscv64/device/serial.rs b/src/arch/riscv64/device/serial.rs index 2528466567..918b4411ed 100644 --- a/src/arch/riscv64/device/serial.rs +++ b/src/arch/riscv64/device/serial.rs @@ -13,15 +13,13 @@ use crate::{ scheme::irq::irq_trigger, }; -pub static COM1: Mutex> = Mutex::new(None); +pub static COM1: Mutex = Mutex::new(SerialKind::NotPresent); pub struct Com1Irq {} impl InterruptHandler for Com1Irq { fn irq_handler(&mut self, irq: u32) { - if let Some(ref mut serial_port) = *COM1.lock() { - serial_port.receive(); - }; + COM1.lock().receive(); unsafe { irq_trigger(irq as u8); IRQ_CHIP.irq_eoi(irq); @@ -31,7 +29,7 @@ impl InterruptHandler for Com1Irq { pub unsafe fn init_early(dtb: &Fdt) { unsafe { - if COM1.lock().is_some() { + if !matches!(*COM1.lock(), SerialKind::NotPresent) { // Hardcoded UART return; } @@ -57,7 +55,7 @@ pub unsafe fn init_early(dtb: &Fdt) { }; match serial_opt { Some(serial) => { - *COM1.lock() = Some(serial); + *COM1.lock() = serial; info!("UART {:?} at {:#X} size {:#X}", compatible, virt, size); } None => { @@ -89,9 +87,7 @@ pub unsafe fn init(fdt: &Fdt) -> Option<()> { register_irq(virq as u32, Box::new(Com1Irq {})); IRQ_CHIP.irq_enable(virq as u32); } - if let Some(ref mut _serial_port) = *COM1.lock() { - // serial_port.enable_irq(); // FIXME receive int is enabled by default in 16550. Disable by default? - } + // COM1.lock().enable_irq(); // FIXME receive int is enabled by default in 16550. Disable by default? Some(()) } } diff --git a/src/arch/x86_shared/debug.rs b/src/arch/x86_shared/debug.rs index 6442d023f6..6145150e38 100644 --- a/src/arch/x86_shared/debug.rs +++ b/src/arch/x86_shared/debug.rs @@ -23,10 +23,10 @@ pub static QEMU: Mutex> = Mutex::new(Pio::::new(0x402)); pub struct Writer<'a> { #[cfg(feature = "lpss_debug")] - lpss: MutexGuard<'a, Option>, + lpss: MutexGuard<'a, SerialKind>, #[cfg(feature = "qemu_debug")] qemu: MutexGuard<'a, Pio>, - serial: MutexGuard<'a, Option>, + serial: MutexGuard<'a, SerialKind>, #[cfg(feature = "system76_ec_debug")] system76_ec: MutexGuard<'a, Option>, } @@ -46,11 +46,7 @@ impl<'a> Writer<'a> { pub fn write(&mut self, buf: &[u8]) { #[cfg(feature = "lpss_debug")] - { - if let Some(ref mut lpss) = *self.lpss { - lpss.write(buf); - } - } + self.lpss.write(buf); #[cfg(feature = "qemu_debug")] { @@ -59,9 +55,7 @@ impl<'a> Writer<'a> { } } - if let Some(serial) = &mut *self.serial { - serial.write(buf) - } + self.serial.write(buf); #[cfg(feature = "system76_ec_debug")] { diff --git a/src/arch/x86_shared/device/serial.rs b/src/arch/x86_shared/device/serial.rs index 5608784f9c..db9611b03d 100644 --- a/src/arch/x86_shared/device/serial.rs +++ b/src/arch/x86_shared/device/serial.rs @@ -6,11 +6,11 @@ use crate::{ }; use spin::Mutex; -pub static COM1: Mutex> = Mutex::new(None); -pub static COM2: Mutex> = Mutex::new(None); +pub static COM1: Mutex = Mutex::new(SerialKind::NotPresent); +pub static COM2: Mutex = Mutex::new(SerialKind::NotPresent); #[cfg(feature = "lpss_debug")] -pub static LPSS: Mutex> = Mutex::new(None); +pub static LPSS: Mutex = Mutex::new(SerialKind::NotPresent); pub unsafe fn init() { if cfg!(not(feature = "serial_debug")) { @@ -20,10 +20,10 @@ pub unsafe fn init() { let mut com1 = SerialPort::>::new(0x3F8); com1.init(); - *COM1.lock() = Some(SerialKind::Ns16550Pio(com1)); + *COM1.lock() = SerialKind::Ns16550Pio(com1); let mut com2 = SerialPort::>::new(0x2F8); com2.init(); - *COM2.lock() = Some(SerialKind::Ns16550Pio(com2)); + *COM2.lock() = SerialKind::Ns16550Pio(com2); // FIXME remove explicit LPSS handling once ACPI SPCR is supported #[cfg(feature = "lpss_debug")] @@ -56,6 +56,6 @@ pub unsafe fn init() { let lpss = unsafe { SerialPort::>::new(crate::PHYS_OFFSET + 0xFE032000) }; lpss.init(); - *LPSS.lock() = Some(SerialKind::Ns16550u32(lpss)); + *LPSS.lock() = SerialKind::Ns16550u32(lpss); } } diff --git a/src/arch/x86_shared/interrupt/irq.rs b/src/arch/x86_shared/interrupt/irq.rs index bfd14d1934..0db58e1330 100644 --- a/src/arch/x86_shared/interrupt/irq.rs +++ b/src/arch/x86_shared/interrupt/irq.rs @@ -197,16 +197,12 @@ interrupt!(cascade, || { }); interrupt!(com2, || { - if let Some(serial) = &mut *COM2.lock() { - serial.receive() - }; + COM2.lock().receive(); unsafe { eoi(3) }; }); interrupt!(com1, || { - if let Some(serial) = &mut *COM1.lock() { - serial.receive() - }; + COM1.lock().receive(); unsafe { eoi(4) }; }); diff --git a/src/devices/serial.rs b/src/devices/serial.rs index 23aa0a5377..7121020dd8 100644 --- a/src/devices/serial.rs +++ b/src/devices/serial.rs @@ -9,6 +9,7 @@ use crate::{ #[allow(dead_code)] pub enum SerialKind { + NotPresent, #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] Ns16550Pio(uart_16550::SerialPort>), Ns16550u8(&'static mut uart_16550::SerialPort>), @@ -21,6 +22,7 @@ impl SerialKind { pub fn enable_irq(&mut self) { //TODO: implement for NS16550 match self { + Self::NotPresent => {} #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] Self::Ns16550Pio(_) => {} Self::Ns16550u8(_) => {} @@ -32,6 +34,7 @@ impl SerialKind { pub fn receive(&mut self) { //TODO: make PL011 receive work the same way as NS16550 match self { + Self::NotPresent => {} #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] Self::Ns16550Pio(inner) => { while let Some(c) = inner.receive() { @@ -57,6 +60,7 @@ impl SerialKind { pub fn write(&mut self, buf: &[u8]) { match self { + Self::NotPresent => {} #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] Self::Ns16550Pio(inner) => inner.write(buf), Self::Ns16550u8(inner) => inner.write(buf),