From 7af6dd1f88e7d2ee74ca1c687723d367e5368ce1 Mon Sep 17 00:00:00 2001 From: Andrey Turkin Date: Thu, 7 Nov 2024 05:09:15 +0300 Subject: [PATCH] Restore riscv,plic0 compatible check --- src/arch/riscv64/device/irqchip/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/riscv64/device/irqchip/mod.rs b/src/arch/riscv64/device/irqchip/mod.rs index a417bf3fa9..310e42875d 100644 --- a/src/arch/riscv64/device/irqchip/mod.rs +++ b/src/arch/riscv64/device/irqchip/mod.rs @@ -14,7 +14,7 @@ mod clint; pub fn new_irqchip(ic_str: &str) -> Option> { if ic_str.contains("riscv,cpu-intc") { Some(Box::new(hlic::Hlic::new())) - } else if ic_str.contains("sifive,plic-1.0.0") { + } else if ic_str.contains("riscv,plic0") || ic_str.contains("sifive,plic-1.0.0") { Some(Box::new(plic::Plic::new())) } else { log::warn!("no driver for interrupt controller {:?}", ic_str);