drm: implement syncobj and fence for VIRGL/VirtIO driver

Extract protocol-agnostic FenceTimeline from Intel to shared
src/drivers/fence.rs — atomic-based fence tracking suitable
for Intel, VIRGL, and AMD drivers.

Extract protocol-agnostic SyncobjManager from Intel to shared
src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/
wait/query and sync_file fd export/import.

Wire both into VirtioDriver:
- Add FenceTimeline + SyncobjManager fields
- Implement all 5 GpuDriver syncobj trait methods
  (create, destroy, wait, export_fd, import_fd)
- Track fence seqnos in virgl_submit_3d (allocate
  before submit, signal after completion)

Intel fence.rs and syncobj.rs converted to thin re-export
modules pointing at shared sources — no behavioral change
for Intel driver.

This gives Mesa VIRGL userspace the standard DRM syncobj
API for GPU/compositor synchronization.

recipes/tools/file/source/python/example.py

@@ -0,0 +1,17 @@
+#! /usr/bin/python
+
+import magic
+
+ms = magic.open(magic.NONE)
+ms.load()
+tp = ms.file("/bin/ls")
+print (tp)
+
+f = open("/bin/ls", "rb")
+buf = f.read(4096)
+f.close()
+
+tp = ms.buffer(buf)
+print (tp)
+
+ms.close()