feat: add VirtGPU ioctl bridge and PCI info patches for libdrm
P1: Replaces the old per-ioctl C handlers with a unified dispatch through\nredox_drm_simple_ioctl(), adds VirtGPU NR mappings (MAP, EXECBUFFER,\nGETPARAM, RESOURCE_CREATE, GET_CAPS, etc.), and special handlers for\nEXECBUFFER (inline command buffer) and GET_CAPS (variable response). P2: Adds __redox__ blocks to drmParsePciBusInfo, drmParsePciDeviceInfo,\nand drmGetDevice2 using the DRM scheme GET_PCI_INFO ioctl to populate\nPCI device identification without /sys access. Ultraworked with [Sisyphus](https://github.com/code-yeongyu/oh-my-openagent) Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
This commit is contained in:
@@ -0,0 +1,278 @@
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--- a/xf86drm.c
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+++ b/xf86drm.c
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@@ -91,6 +91,7 @@
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#include "xf86drm_redox.h"
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#include "libdrm_macros.h"
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#include "drm_fourcc.h"
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+#include "virtgpu_drm.h"
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#include "util_math.h"
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@@ -813,6 +814,50 @@
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return REDOX_DRM_IOCTL_MODE_DESTROY_DUMB;
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case 0xAF:
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return REDOX_DRM_IOCTL_MODE_RMFB;
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+ /* VirtGPU ioctls (NR 0x41-0x4B) */
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+ case 0x41:
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+ return REDOX_DRM_IOCTL_VIRTGPU_MAP;
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+ case 0x42:
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+ return REDOX_DRM_IOCTL_VIRTGPU_EXECBUFFER;
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+ case 0x43:
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+ return REDOX_DRM_IOCTL_VIRTGPU_GETPARAM;
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+ case 0x44:
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+ return REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_CREATE;
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+ case 0x45:
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+ return REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_INFO;
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+ case 0x46:
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+ return REDOX_DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST;
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+ case 0x47:
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+ return REDOX_DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST;
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+ case 0x48:
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+ return REDOX_DRM_IOCTL_VIRTGPU_WAIT;
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+ case 0x49:
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+ return REDOX_DRM_IOCTL_VIRTGPU_GET_CAPS;
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+ case 0x4A:
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+ return REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB;
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+ case 0x4B:
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+ return REDOX_DRM_IOCTL_VIRTGPU_CONTEXT_INIT;
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+ /* Additional standard DRM ioctls */
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+ case 0x00:
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+ return REDOX_DRM_IOCTL_VERSION;
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+ case 0xA0:
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+ return REDOX_DRM_IOCTL_MODE_GETRESOURCES;
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+ case 0xA1:
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+ return REDOX_DRM_IOCTL_MODE_GETCRTC;
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+ case 0xA2:
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+ return REDOX_DRM_IOCTL_MODE_SETCRTC;
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+ case 0xA3:
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+ return REDOX_DRM_IOCTL_MODE_GETCONNECTOR;
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+ case 0xA4:
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+ return REDOX_DRM_IOCTL_MODE_PAGE_FLIP;
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+ case 0xA8:
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+ return REDOX_DRM_IOCTL_MODE_CREATE_DUMB;
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+ case 0xAC:
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+ return REDOX_DRM_IOCTL_MODE_ADDFB;
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+ case 0x2B:
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+ return REDOX_DRM_IOCTL_PRIME_HANDLE_TO_FD;
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+ case 0x2C:
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+ return REDOX_DRM_IOCTL_PRIME_FD_TO_HANDLE;
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default:
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return 0;
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}
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@@ -908,7 +953,19 @@
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static size_t redox_drm_expected_response_size(unsigned long linux_nr, size_t arg_size)
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{
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switch (linux_nr) {
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+ case 0x00: /* VERSION */
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case 0x0C:
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+ case 0x2B: /* PRIME_HANDLE_TO_FD */
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+ case 0x2C: /* PRIME_FD_TO_HANDLE */
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+ case 0x41: /* VIRTGPU_MAP */
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+ case 0x43: /* VIRTGPU_GETPARAM */
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+ case 0x44: /* VIRTGPU_RESOURCE_CREATE */
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+ case 0x45: /* VIRTGPU_RESOURCE_INFO */
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+ case 0xA0: /* MODE_GETRESOURCES */
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+ case 0xA1: /* MODE_GETCRTC */
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+ case 0xA3: /* MODE_GETCONNECTOR */
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+ case 0xA8: /* MODE_CREATE_DUMB */
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+ case 0xAC: /* MODE_ADDFB */
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case 0xA6:
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case 0xB3:
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return arg_size;
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@@ -927,6 +984,41 @@
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if (request_code == 0) {
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errno = ENOTTY;
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return -1;
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+ }
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+
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+ if (linux_nr == 0x42) { /* VIRTGPU_EXECBUFFER */
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+ struct drm_virtgpu_execbuffer *eb = arg;
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+ size_t total = arg_size + eb->size;
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+ uint8_t *buf = drmMalloc((int)total);
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+ int ret;
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+
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+ if (!buf)
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+ return -1;
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+
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+ memcpy(buf, arg, arg_size);
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+ if (eb->size > 0 && eb->command)
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+ memcpy(buf + arg_size, (void *)(uintptr_t)eb->command, eb->size);
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+
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+ ret = redox_drm_exchange(fd, request_code, buf, total, NULL, 0, NULL);
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+ drmFree(buf);
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+ return ret;
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+ }
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+
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+ if (linux_nr == 0x49) { /* VIRTGPU_GET_CAPS */
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+ struct drm_virtgpu_get_caps *gc = arg;
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+ void *resp;
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+ size_t resp_size;
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+ int ret;
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+
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+ ret = redox_drm_exchange_alloc(fd, request_code, arg, arg_size, &resp, &resp_size);
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+ if (ret == 0 && resp && resp_size > 0) {
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+ size_t copy = resp_size < gc->size ? resp_size : gc->size;
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+
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+ memcpy((void *)(uintptr_t)gc->addr, resp, copy);
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+ drmFree(resp);
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+ }
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+
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+ return ret;
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}
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if (redox_drm_exchange(fd, request_code,
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--- a/xf86drm_redox.h
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+++ b/xf86drm_redox.h
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@@ -28,6 +28,17 @@
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#define REDOX_DRM_IOCTL_GEM_CLOSE (REDOX_DRM_IOCTL_BASE + 27)
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#define REDOX_DRM_IOCTL_PRIME_HANDLE_TO_FD (REDOX_DRM_IOCTL_BASE + 29)
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#define REDOX_DRM_IOCTL_PRIME_FD_TO_HANDLE (REDOX_DRM_IOCTL_BASE + 30)
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+#define REDOX_DRM_IOCTL_VIRTGPU_MAP (REDOX_DRM_IOCTL_BASE + 31)
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+#define REDOX_DRM_IOCTL_VIRTGPU_EXECBUFFER (REDOX_DRM_IOCTL_BASE + 32)
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+#define REDOX_DRM_IOCTL_VIRTGPU_GETPARAM (REDOX_DRM_IOCTL_BASE + 33)
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+#define REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_CREATE (REDOX_DRM_IOCTL_BASE + 34)
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+#define REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_INFO (REDOX_DRM_IOCTL_BASE + 35)
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+#define REDOX_DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST (REDOX_DRM_IOCTL_BASE + 36)
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+#define REDOX_DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST (REDOX_DRM_IOCTL_BASE + 37)
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+#define REDOX_DRM_IOCTL_VIRTGPU_WAIT (REDOX_DRM_IOCTL_BASE + 38)
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+#define REDOX_DRM_IOCTL_VIRTGPU_GET_CAPS (REDOX_DRM_IOCTL_BASE + 39)
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+#define REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB (REDOX_DRM_IOCTL_BASE + 40)
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+#define REDOX_DRM_IOCTL_VIRTGPU_CONTEXT_INIT (REDOX_DRM_IOCTL_BASE + 41)
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struct redox_drm_resources_wire {
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uint32_t connector_count;
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--- /dev/null
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+++ b/virtgpu_drm.h
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@@ -0,0 +1,132 @@
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+#ifndef _VIRTGPU_DRM_H_
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+#define _VIRTGPU_DRM_H_
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+
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+#include <stdint.h>
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+
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+#define DRM_VIRTGPU_MAP 0x41
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+#define DRM_VIRTGPU_EXECBUFFER 0x42
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+#define DRM_VIRTGPU_GETPARAM 0x43
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+#define DRM_VIRTGPU_RESOURCE_CREATE 0x44
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+#define DRM_VIRTGPU_RESOURCE_INFO 0x45
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+#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x46
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+#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x47
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+#define DRM_VIRTGPU_WAIT 0x48
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+#define DRM_VIRTGPU_GET_CAPS 0x49
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+#define DRM_VIRTGPU_RESOURCE_CREATE_BLOB 0x4A
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+#define DRM_VIRTGPU_CONTEXT_INIT 0x4B
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+
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+#define drm_virtgpu_resource_create drm_virtgpu_resource_create_3d
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+#define drm_virtgpu_3d_transfer_to_host drm_virtgpu_transfer_to_host
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+#define drm_virtgpu_3d_transfer_from_host drm_virtgpu_transfer_from_host
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+#define drm_virtgpu_3d_wait drm_virtgpu_wait_3d
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+#define ctx_set_params_ptr ctx_set_params
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+#define resource_id res_handle
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+
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+struct drm_virtgpu_3d_box {
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+ uint32_t x;
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+ uint32_t y;
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+ uint32_t z;
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+ uint32_t w;
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+ uint32_t h;
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+ uint32_t d;
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+};
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+
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+struct drm_virtgpu_execbuffer {
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+ uint32_t flags;
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+ uint32_t size;
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+ uint64_t command;
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+ uint64_t bo_handles;
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+ uint32_t num_bo_handles;
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+ int32_t fence_fd;
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+ uint32_t ring_idx;
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+ uint32_t syncobj_stride;
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+ uint32_t num_in_syncobjs;
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+ uint32_t num_out_syncobjs;
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+ uint64_t in_syncobjs;
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+ uint64_t out_syncobjs;
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+};
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+
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+struct drm_virtgpu_getparam {
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+ uint64_t param;
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+ uint64_t value;
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+};
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+
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+struct drm_virtgpu_resource_create_3d {
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+ uint32_t target;
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+ uint32_t format;
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+ uint32_t bind;
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+ uint32_t width;
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+ uint32_t height;
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+ uint32_t depth;
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+ uint32_t array_size;
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+ uint32_t last_level;
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+ uint32_t nr_samples;
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+ uint32_t flags;
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+ uint32_t bo_handle;
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+ uint32_t res_handle;
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+ uint32_t size;
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+ uint32_t stride;
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+};
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+
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+struct drm_virtgpu_resource_info {
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+ uint32_t bo_handle;
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+ uint32_t res_handle;
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+ uint32_t size;
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+ uint32_t blob_mem;
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+};
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+
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+struct drm_virtgpu_transfer_to_host {
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+ uint32_t bo_handle;
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+ struct drm_virtgpu_3d_box box;
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+ uint32_t level;
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+ uint32_t offset;
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+ uint32_t stride;
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+ uint32_t layer_stride;
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+};
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+
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+struct drm_virtgpu_transfer_from_host {
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+ uint32_t bo_handle;
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+ struct drm_virtgpu_3d_box box;
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+ uint32_t level;
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+ uint32_t offset;
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+ uint32_t stride;
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+ uint32_t layer_stride;
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+};
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+
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+struct drm_virtgpu_wait_3d {
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+ uint32_t handle;
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+ uint32_t flags;
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+};
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+
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+struct drm_virtgpu_get_caps {
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+ uint32_t cap_set_id;
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+ uint32_t cap_set_ver;
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+ uint64_t addr;
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+ uint32_t size;
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+ uint32_t pad;
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+};
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+
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+struct drm_virtgpu_resource_create_blob {
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+ uint32_t blob_mem;
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+ uint32_t blob_flags;
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+ uint32_t bo_handle;
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+ uint32_t res_handle;
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+ uint64_t size;
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+ uint32_t pad;
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+ uint32_t cmd_size;
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+ uint64_t cmd;
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+ uint64_t blob_id;
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+};
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+
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+struct drm_virtgpu_context_set_param {
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+ uint64_t param;
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+ uint64_t value;
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+};
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+
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+struct drm_virtgpu_context_init {
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+ uint32_t num_params;
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+ uint32_t pad;
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+ uint64_t ctx_set_params;
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+};
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+
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+#endif
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@@ -0,0 +1,30 @@
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diff --git a/local/recipes/libs/libdrm/source/xf86drm.c b/local/recipes/libs/libdrm/source/xf86drm.c
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index 0379aafd7e..2d3fcd6d3b 100644
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--- a/local/recipes/libs/libdrm/source/xf86drm.c
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+++ b/local/recipes/libs/libdrm/source/xf86drm.c
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@@ -1653,6 +1653,10 @@ static size_t redox_drm_expected_response_size(unsigned long linux_nr, size_t ar
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case 0xA9:
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case 0xAA:
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case 0xAC:
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+ case 0xB2:
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+ case 0xB4:
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+ case 0xBD:
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+ case 0xBE:
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case 0xB8:
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case 0xB9:
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case 0xB3:
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@@ -4482,7 +4486,13 @@ drm_public int drmPrimeHandleToFD(int fd, uint32_t handle, uint32_t flags,
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return -errno;
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}
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- *prime_fd = response.fd;
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+ char path[64];
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+ snprintf(path, sizeof(path), "card0/dmabuf/%d", response.fd);
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+ int real_fd = openat(fd, path, O_RDWR | O_CLOEXEC);
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+ if (real_fd < 0) {
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+ return -errno;
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+ }
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+ *prime_fd = real_fd;
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return 0;
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#else
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struct drm_prime_handle args;
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@@ -0,0 +1,153 @@
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--- a/xf86drm.c
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+++ b/xf86drm.c
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@@ -115,7 +115,7 @@
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#define DRM_MAJOR 226 /* Linux */
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#endif
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-#if defined(__OpenBSD__) || defined(__DragonFly__)
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+#if defined(__OpenBSD__) || defined(__DragonFly__) || defined(__redox__)
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struct drm_pciinfo {
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uint16_t domain;
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uint8_t bus;
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@@ -858,6 +858,9 @@
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return REDOX_DRM_IOCTL_PRIME_HANDLE_TO_FD;
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case 0x2C:
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return REDOX_DRM_IOCTL_PRIME_FD_TO_HANDLE;
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+ /* DRM_IOCTL_GET_PCIINFO — PCI device information for driver discovery */
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+ case 0x15:
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+ return REDOX_DRM_IOCTL_GET_PCI_INFO;
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default:
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return 0;
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}
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@@ -4201,6 +4204,21 @@
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return 0;
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#elif defined(__FreeBSD__)
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return get_sysctl_pci_bus_info(maj, min, info);
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+#elif defined(__redox__)
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+ int rfd = open("/scheme/drm/card0", O_RDONLY);
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+ if (rfd < 0)
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+ return -errno;
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+ uint8_t buf[22];
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+ size_t rsize = 0;
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+ int ret = redox_drm_exchange(rfd, REDOX_DRM_IOCTL_GET_PCI_INFO, NULL, 0, buf, sizeof(buf), &rsize);
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+ close(rfd);
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+ if (ret != 0 || rsize < 17)
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+ return -EIO;
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+ info->domain = buf[10] | (buf[11] << 8) | (buf[12] << 16) | (buf[13] << 24);
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+ info->bus = buf[14];
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+ info->dev = buf[15];
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+ info->func = buf[16];
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+ return 0;
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#else
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#warning "Missing implementation of drmParsePciBusInfo"
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return -EINVAL;
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@@ -4410,6 +4428,23 @@
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device->revision_id = results[0].pc_revid;
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return 0;
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+#elif defined(__redox__)
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+ int rfd2 = open("/scheme/drm/card0", O_RDONLY);
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+ if (rfd2 < 0)
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+ return -errno;
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+ uint8_t dbuf[22];
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+ size_t drsize = 0;
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+ int dret = redox_drm_exchange(rfd2, REDOX_DRM_IOCTL_GET_PCI_INFO, NULL, 0, dbuf, sizeof(dbuf), &drsize);
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+ close(rfd2);
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+ if (dret != 0 || drsize < 9)
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+ return -EIO;
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+ device->vendor_id = dbuf[0] | (dbuf[1] << 8);
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+ device->device_id = dbuf[2] | (dbuf[3] << 8);
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+ device->subvendor_id = dbuf[4] | (dbuf[5] << 8);
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+ device->subdevice_id = dbuf[6] | (dbuf[7] << 8);
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+ if (drsize >= 9)
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+ device->revision_id = dbuf[8];
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+ return 0;
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#else
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#warning "Missing implementation of drmParsePciDeviceInfo"
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return -EINVAL;
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@@ -5162,6 +5197,66 @@
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*/
|
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drm_public int drmGetDevice2(int fd, uint32_t flags, drmDevicePtr *device)
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{
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+#if defined(__redox__)
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+ uint8_t pbuf[22];
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+ size_t prsize = 0;
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+ int pret;
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+ uint16_t pvendor_id, pdevice_id, psubvendor_id, psubdevice_id, pdomain;
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+ uint8_t prevision_id, pbus, pdev, pfunc;
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+ const char *pnode;
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+ int max_node_length, i;
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+ size_t extra, psize;
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+ drmDevicePtr devp;
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+ char *pptr;
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+
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+ pret = redox_drm_exchange(fd, REDOX_DRM_IOCTL_GET_PCI_INFO, NULL, 0,
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+ pbuf, sizeof(pbuf), &prsize);
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+ if (pret != 0 || prsize < 17)
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+ return -EIO;
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+
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+ pvendor_id = pbuf[0] | (pbuf[1] << 8);
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+ pdevice_id = pbuf[2] | (pbuf[3] << 8);
|
||||
+ psubvendor_id = pbuf[4] | (pbuf[5] << 8);
|
||||
+ psubdevice_id = pbuf[6] | (pbuf[7] << 8);
|
||||
+ prevision_id = pbuf[8];
|
||||
+ pdomain = pbuf[10] | (pbuf[11] << 8) | (pbuf[12] << 16) | (pbuf[13] << 24);
|
||||
+ pbus = pbuf[14];
|
||||
+ pdev = pbuf[15];
|
||||
+ pfunc = pbuf[16];
|
||||
+
|
||||
+ pnode = "/scheme/drm/card0";
|
||||
+ max_node_length = 64;
|
||||
+ extra = DRM_NODE_MAX * (sizeof(void *) + max_node_length);
|
||||
+ psize = sizeof(drmDevice) + extra + sizeof(drmPciBusInfo) + sizeof(drmPciDeviceInfo);
|
||||
+ devp = calloc(1, psize);
|
||||
+ if (!devp)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ devp->bustype = DRM_BUS_PCI;
|
||||
+ devp->available_nodes = 1 << DRM_NODE_PRIMARY;
|
||||
+ pptr = (char *)devp + sizeof(drmDevice);
|
||||
+ devp->nodes = (char **)pptr;
|
||||
+ pptr += DRM_NODE_MAX * sizeof(void *);
|
||||
+ for (i = 0; i < DRM_NODE_MAX; i++) { devp->nodes[i] = pptr; pptr += max_node_length; }
|
||||
+ snprintf(devp->nodes[DRM_NODE_PRIMARY], max_node_length, "%s", pnode);
|
||||
+
|
||||
+ devp->businfo.pci = (drmPciBusInfoPtr)pptr;
|
||||
+ pptr += sizeof(drmPciBusInfo);
|
||||
+ devp->businfo.pci->domain = pdomain;
|
||||
+ devp->businfo.pci->bus = pbus;
|
||||
+ devp->businfo.pci->dev = pdev;
|
||||
+ devp->businfo.pci->func = pfunc;
|
||||
+
|
||||
+ devp->deviceinfo.pci = (drmPciDeviceInfoPtr)pptr;
|
||||
+ devp->deviceinfo.pci->vendor_id = pvendor_id;
|
||||
+ devp->deviceinfo.pci->device_id = pdevice_id;
|
||||
+ devp->deviceinfo.pci->subvendor_id = psubvendor_id;
|
||||
+ devp->deviceinfo.pci->subdevice_id = psubdevice_id;
|
||||
+ devp->deviceinfo.pci->revision_id = prevision_id;
|
||||
+
|
||||
+ *device = devp;
|
||||
+ return 0;
|
||||
+#else
|
||||
struct stat sbuf;
|
||||
|
||||
if (fd == -1)
|
||||
@@ -5174,6 +5269,7 @@
|
||||
return -EINVAL;
|
||||
|
||||
return drmGetDeviceFromDevId(sbuf.st_rdev, flags, device);
|
||||
+#endif
|
||||
}
|
||||
|
||||
/**
|
||||
--- a/xf86drm_redox.h
|
||||
+++ b/xf86drm_redox.h
|
||||
@@ -40,6 +40,8 @@
|
||||
#define REDOX_DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB (REDOX_DRM_IOCTL_BASE + 40)
|
||||
#define REDOX_DRM_IOCTL_VIRTGPU_CONTEXT_INIT (REDOX_DRM_IOCTL_BASE + 41)
|
||||
|
||||
+#define REDOX_DRM_IOCTL_GET_PCI_INFO (REDOX_DRM_IOCTL_BASE + 0x60)
|
||||
+
|
||||
struct redox_drm_resources_wire {
|
||||
uint32_t connector_count;
|
||||
uint32_t crtc_count;
|
||||
Reference in New Issue
Block a user