feat: build system transition to release fork + archive hardening
Release fork infrastructure: - REDBEAR_RELEASE=0.1.1 with offline enforcement (fetch/distclean/unfetch blocked) - 195 BLAKE3-verified source archives in standard format - Atomic provisioning via provision-release.sh (staging + .complete sentry) - 5-phase improvement plan: restore format auto-detection, source tree validation (validate-source-trees.py), archive-map.json, REPO_BINARY fallback Archive normalization: - Removed 87 duplicate/unversioned archives from shared pool - Regenerated all archives in consistent format with source/ + recipe.toml - BLAKE3SUMS and manifest.json generated from stable tarball set Patch management: - verify-patches.sh: pre-sync dry-run report (OK/REVERSED/CONFLICT) - 121 upstream-absorbed patches moved to absorbed/ directories - 43 active patches verified clean against rebased sources - Stress test: base updated to upstream HEAD, relibc reset and patched Compilation fixes: - relibc: Vec imports in redox-rt (proc.rs, lib.rs, sys.rs) - relibc: unsafe from_raw_parts in mod.rs (2024 edition) - fetch.rs: rev comparison handles short/full hash prefixes - kibi recipe: corrected rev mismatch New scripts: restore-sources.sh, provision-release.sh, verify-sources-archived.sh, check-upstream-releases.sh, validate-source-trees.py, verify-patches.sh, repair-archive-format.sh, generate-manifest.py Documentation: AGENTS.md, README.md, local/AGENTS.md updated for release fork model
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@@ -1,162 +0,0 @@
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# P2-ixgbed-error-handling.patch
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#
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# 10GbE Intel ixgbe driver error handling: replace println!/unwrap()/expect()
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# with log::info!/log::error!/log::warn! and proper error propagation.
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# This file was the only gap in the base patch split coverage.
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diff --git a/drivers/net/ixgbed/src/device.rs b/drivers/net/ixgbed/src/device.rs
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index 0d59b46d..fc7c009f 100644
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--- a/drivers/net/ixgbed/src/device.rs
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+++ b/drivers/net/ixgbed/src/device.rs
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@@ -3,7 +3,7 @@ use std::time::{Duration, Instant};
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use std::{cmp, mem, ptr, slice, thread};
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use driver_network::NetworkAdapter;
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-use syscall::error::Result;
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+use syscall::error::{Error, Result, EIO};
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use common::dma::Dma;
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@@ -45,7 +45,12 @@ impl NetworkAdapter for Intel8259x {
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if (status & IXGBE_RXDADV_STAT_DD) != 0 {
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if (status & IXGBE_RXDADV_STAT_EOP) == 0 {
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- panic!("increase buffer size or decrease MTU")
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+ log::error!("ixgbed: received fragmented packet, skipping descriptor");
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+ desc.read.pkt_addr = self.receive_buffer[self.receive_index].physical() as u64;
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+ desc.read.hdr_addr = 0;
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+ self.write_reg(IXGBE_RDT(0), self.receive_index as u32);
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+ self.receive_index = wrap_ring(self.receive_index, self.receive_ring.len());
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+ return Ok(None);
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}
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let data = unsafe {
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@@ -132,13 +137,25 @@ impl Intel8259x {
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.map(|_| Ok(unsafe { Dma::zeroed()?.assume_init() }))
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.collect::<Result<Vec<_>>>()?
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.try_into()
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- .unwrap_or_else(|_| unreachable!()),
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+ .map_err(|v: Vec<_>| {
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+ log::error!(
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+ "ixgbed: internal error: DMA buffer array conversion failed (got {} items, expected 32)",
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+ v.len()
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+ );
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+ Error::new(EIO)
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+ })?,
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receive_ring: unsafe { Dma::zeroed()?.assume_init() },
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transmit_buffer: (0..32)
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.map(|_| Ok(unsafe { Dma::zeroed()?.assume_init() }))
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.collect::<Result<Vec<_>>>()?
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.try_into()
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- .unwrap_or_else(|_| unreachable!()),
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+ .map_err(|v: Vec<_>| {
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+ log::error!(
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+ "ixgbed: internal error: DMA buffer array conversion failed (got {} items, expected 32)",
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+ v.len()
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+ );
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+ Error::new(EIO)
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+ })?,
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receive_index: 0,
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transmit_ring: unsafe { Dma::zeroed()?.assume_init() },
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transmit_ring_free: 32,
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@@ -166,7 +183,7 @@ impl Intel8259x {
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if (status & IXGBE_RXDADV_STAT_DD) != 0 {
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if (status & IXGBE_RXDADV_STAT_EOP) == 0 {
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- panic!("increase buffer size or decrease MTU")
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+ log::error!("ixgbed: received fragmented packet, buffer too small");
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}
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return unsafe { desc.wb.upper.length as usize };
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@@ -205,13 +222,8 @@ impl Intel8259x {
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self.mac_address = mac;
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}
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- /// Returns the register at `self.base` + `register`.
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- ///
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- /// # Panics
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- ///
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- /// Panics if `self.base` + `register` does not belong to the mapped memory of the PCIe device.
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fn read_reg(&self, register: u32) -> u32 {
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- assert!(
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+ debug_assert!(
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register as usize <= self.size - 4 as usize,
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"MMIO access out of bounds"
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);
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@@ -219,13 +231,8 @@ impl Intel8259x {
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unsafe { ptr::read_volatile((self.base + register as usize) as *mut u32) }
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}
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- /// Sets the register at `self.base` + `register`.
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- ///
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- /// # Panics
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- ///
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- /// Panics if `self.base` + `register` does not belong to the mapped memory of the PCIe device.
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fn write_reg(&self, register: u32, data: u32) -> u32 {
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- assert!(
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+ debug_assert!(
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register as usize <= self.size - 4 as usize,
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"MMIO access out of bounds"
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);
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@@ -279,7 +286,7 @@ impl Intel8259x {
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let mac = self.get_mac_addr();
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- println!(
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+ log::info!(
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" - MAC: {:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}:{:>02X}",
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mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]
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);
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@@ -438,13 +445,11 @@ impl Intel8259x {
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}
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/// Sets the rx queues` descriptors and enables the queues.
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- ///
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- /// # Panics
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- /// Panics if length of `self.receive_ring` is not a power of 2.
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fn start_rx_queue(&mut self, queue_id: u16) {
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- if self.receive_ring.len() & (self.receive_ring.len() - 1) != 0 {
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- panic!("number of receive queue entries must be a power of 2");
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- }
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+ debug_assert!(
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+ self.receive_ring.len() & (self.receive_ring.len() - 1) == 0,
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+ "number of receive queue entries must be a power of 2"
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+ );
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for i in 0..self.receive_ring.len() {
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self.receive_ring[i].read.pkt_addr = self.receive_buffer[i].physical() as u64;
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@@ -466,13 +471,11 @@ impl Intel8259x {
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}
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/// Enables the tx queues.
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- ///
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- /// # Panics
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- /// Panics if length of `self.transmit_ring` is not a power of 2.
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fn start_tx_queue(&mut self, queue_id: u16) {
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- if self.transmit_ring.len() & (self.transmit_ring.len() - 1) != 0 {
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- panic!("number of receive queue entries must be a power of 2");
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- }
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+ debug_assert!(
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+ self.transmit_ring.len() & (self.transmit_ring.len() - 1) == 0,
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+ "number of transmit queue entries must be a power of 2"
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+ );
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for i in 0..self.transmit_ring.len() {
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self.transmit_ring[i].read.buffer_addr = self.transmit_buffer[i].physical() as u64;
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@@ -506,14 +509,14 @@ impl Intel8259x {
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/// Waits for the link to come up.
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fn wait_for_link(&self) {
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- println!(" - waiting for link");
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+ log::info!(" - waiting for link");
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let time = Instant::now();
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let mut speed = self.get_link_speed();
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while speed == 0 && time.elapsed().as_secs() < 10 {
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thread::sleep(Duration::from_millis(100));
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speed = self.get_link_speed();
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}
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- println!(" - link speed is {} Mbit/s", self.get_link_speed());
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+ log::info!(" - link speed is {} Mbit/s", self.get_link_speed());
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}
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/// Enables or disables promisc mode of this device.
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