diff --git a/local/recipes/gpu/redox-drm/source/src/scheme.rs b/local/recipes/gpu/redox-drm/source/src/scheme.rs index 02c5f87a5a..4c440d06af 100644 --- a/local/recipes/gpu/redox-drm/source/src/scheme.rs +++ b/local/recipes/gpu/redox-drm/source/src/scheme.rs @@ -2223,8 +2223,8 @@ impl DrmScheme { } REDOX_DRM_IOCTL_I915_GEM_MADVISE => { let mut req = decode_wire::(payload)?; - self.driver.i915_gem_madvise(req.handle, req.state)?; - req.retained = if self.driver.i915_gem_madvise(req.handle, 0)? { 1 } else { 0 }; + let retained = self.driver.i915_gem_madvise(req.handle, req.state)?; + req.retained = u32::from(retained); bytes_of(&req) } REDOX_DRM_IOCTL_I915_GEM_CONTEXT_CREATE => { @@ -2279,8 +2279,30 @@ impl DrmScheme { Vec::new() } REDOX_DRM_IOCTL_I915_GEM_VM_BIND => { - let _req = decode_wire::(payload)?; - Vec::new() + let mut req = decode_wire::(payload)?; + let num_binds = req.num_binds as usize; + if num_binds > 4096 { + warn!( + "redox-drm: I915_GEM_VM_BIND rejected — num_binds={} exceeds cap", + num_binds + ); + return Err(Error::new(EINVAL)); + } + if req.syncs_ptr != 0 || req.extensions_ptr != 0 { + warn!("redox-drm: I915_GEM_VM_BIND extensions/syncs not implemented"); + } + let exec_handle = req.exec_handle; + if exec_handle != 0 { + self.driver.i915_gem_vm_bind( + req.vm_id, + exec_handle, + 0, + 0, + req.flags, + )?; + } + req.num_binds = 0; + bytes_of(&req) } REDOX_DRM_IOCTL_AMDGPU_GEM_CREATE => { let mut req = decode_wire::(payload)?; diff --git a/local/recipes/libs/mesa/source/src/gallium/meson.build b/local/recipes/libs/mesa/source/src/gallium/meson.build index 875d78fb09..9d5736494e 100644 --- a/local/recipes/libs/mesa/source/src/gallium/meson.build +++ b/local/recipes/libs/mesa/source/src/gallium/meson.build @@ -8,7 +8,7 @@ foreach d : [[with_gallium_r300 or with_gallium_radeonsi or with_gallium_r600, ' [with_gallium_radeonsi, 'amdgpu_winsys_create'], [with_gallium_nouveau, 'nouveau_drm_screen_create'], [with_gallium_freedreno, 'fd_drm_screen_create_renderonly'], - [with_gallium_iris or with_gallium_radeonsi, 'redox_drm_winsys_create'], + [with_gallium_iris or with_gallium_radeonsi, 'redox_drm_create_screen'], [amd_with_llvm and with_gallium_radeonsi, 'ac_init_shared_llvm_once']] if d[0] sym_config.set(d[1], d[1] + ';')