From 4aa6b9d5fd0cef6601bdef7e34adea6f6de467a2 Mon Sep 17 00:00:00 2001 From: Admin Pupkin Date: Tue, 2 Jun 2026 11:53:49 +0300 Subject: [PATCH] fix: restore DRRS constants lost in comment edit --- .../gpu/redox-drm/source/src/drivers/intel/drrs.rs | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs b/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs index aabdab73bb..07989f0dc9 100644 --- a/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs +++ b/local/recipes/gpu/redox-drm/source/src/drivers/intel/drrs.rs @@ -16,9 +16,21 @@ use crate::kms::ModeInfo; // DRRS_CTL (0x46100): enable (bit 31), idle frames (bits 15-8) // DRRS_STATUS (0x46104): active low RR (bit 31), current low RR (bit 0) // -// mark_active() resets the idle timer — called by compositor on frame updates. +// mark_active() resets the idle timer — called by compositor on updates. // should_enter_low_rr() checks if idle timeout has elapsed. +const DRRS_CTL_BASE: usize = 0x46100; +const DRRS_CTL_ENABLE: u32 = 1 << 31; +const DRRS_CTL_IDLE_FRAMES_SHIFT: u32 = 8; +const DRRS_CTL_IDLE_FRAMES_MASK: u32 = 0xFF; + +const DRRS_STATUS_BASE: usize = 0x46104; +const DRRS_STATUS_ACTIVE_LOW_RR: u32 = 1 << 31; +const DRRS_STATUS_CURRENT_LOW_RR: u32 = 1 << 0; + +const DRRS_IDLE_TIMEOUT_MS: u64 = 1000; +const DRRS_IDLE_FRAMES_DEFAULT: u32 = 4; + pub struct DrrsState { mmio: Arc, enabled: bool,