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Add rustfmt from relibc and apply it with cargo fmt

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This commit is contained in:
Jeremy Soller
2024-01-17 13:52:01 -07:00
parent 73897bd83d
commit 45f1c4e29e
166 changed files with 7353 additions and 3851 deletions
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src/arch/aarch64/device/generic_timer.rs
+26 -17
View File
@@ -1,19 +1,15 @@
use crate::log::{debug, info};
use alloc::boxed::Box;
use crate::log::{info, debug};
use crate::{
arch::device::irqchip::IRQ_CHIP, context, context::timeout,
device::cpu::registers::control_regs, dtb::DTB_BINARY, init::device_tree::find_compatible_node,
interrupt::irq::trigger, time,
};
use alloc::vec::Vec;
use byteorder::{ByteOrder, BE};
use crate::arch::device::irqchip::IRQ_CHIP;
use crate::context::timeout;
use crate::device::cpu::registers::control_regs;
use crate::init::device_tree::find_compatible_node;
use crate::interrupt::irq::trigger;
use crate::time;
use crate::context;
use crate::dtb::DTB_BINARY;
use super::irqchip::InterruptHandler;
use super::irqchip::register_irq;
use super::irqchip::{register_irq, InterruptHandler};
bitflags! {
struct TimerCtrlFlags: u32 {
@@ -24,19 +20,28 @@ bitflags! {
}
pub unsafe fn init() {
let mut timer = GenericTimer{ clk_freq: 0, reload_count: 0};
let mut timer = GenericTimer {
clk_freq: 0,
reload_count: 0,
};
timer.init();
let data = DTB_BINARY.get().unwrap();
let fdt = fdt::DeviceTree::new(data).unwrap();
if let Some(node) = find_compatible_node(&fdt, "arm,armv7-timer") {
let interrupts = node.properties().find(|p| p.name.contains("interrupts")).unwrap();
let interrupts = node
.properties()
.find(|p| p.name.contains("interrupts"))
.unwrap();
let mut intr_data = Vec::new();
for chunk in interrupts.data.chunks(4) {
let val = BE::read_u32(chunk);
intr_data.push(val);
}
let mut ic_idx = IRQ_CHIP.irq_chip_list.root_idx;
if let Some(interrupt_parent) = node.properties().find(|p| p.name.contains("interrupt-parent")) {
if let Some(interrupt_parent) = node
.properties()
.find(|p| p.name.contains("interrupt-parent"))
{
let phandle = BE::read_u32(interrupt_parent.data);
let mut i = 0;
while i < IRQ_CHIP.irq_chip_list.chips.len() {
@@ -49,7 +54,10 @@ pub unsafe fn init() {
}
}
//PHYS_NONSECURE_PPI only
let virq = IRQ_CHIP.irq_chip_list.chips[ic_idx].ic.irq_xlate(&intr_data, 1).unwrap();
let virq = IRQ_CHIP.irq_chip_list.chips[ic_idx]
.ic
.irq_xlate(&intr_data, 1)
.unwrap();
info!("generic_timer virq = {}", virq);
register_irq(virq as u32, Box::new(timer));
IRQ_CHIP.irq_enable(virq as u32);
@@ -109,7 +117,6 @@ impl GenericTimer {
impl InterruptHandler for GenericTimer {
fn irq_handler(&mut self, irq: u32) {
self.clear_irq();
{
*time::OFFSET.lock() += self.clk_freq as u128;
@@ -119,7 +126,9 @@ impl InterruptHandler for GenericTimer {
context::switch::tick();
unsafe { trigger(irq); }
unsafe {
trigger(irq);
}
self.reload_count();
}
}